<?xml version="1.0" encoding="UTF-8"?>
<!-- Product Version: Vivado v2018.3 (64-bit)              -->
<!-- SW Build 2405991 on Thu Dec  6 23:36:41 MST 2018  -->
<!--                                                         -->
<!-- Copyright 1986-2018 Xilinx, Inc. All Rights Reserved.   -->
<!-- Dec  6 2018                                             -->
<!--                                                         -->
<!-- This file is generated by the software with the Tcl write_mem_info command. -->
<!-- Do not edit this file.                                                      -->

<MemInfo Version="1" Minor="6">
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    <MemoryLayout Name="video_capture_hdmi_inst/video_capture_inst/striped_encoders_inst/gen_encoders[3].buffered_encoder_inst/fifo_dout/xpm_fifo_base_inst/gen_sdpram.xpm_memory_base_inst" CoreMemory_Width="65" MemoryType="RAM_SDP">
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