﻿<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<EDKSYSTEM EDWVERSION="1.2" TIMESTAMP="Mon Feb  2 21:00:07 2026" VIVADOVERSION="2024.2">

  <SYSTEMINFO ARCH="zynq" DEVICE="7z010" NAME="system" PACKAGE="clg400" SPEEDGRADE="-1"/>

  <EXTERNALPORTS>
    <PORT DIR="IO" LEFT="14" NAME="DDR_addr" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_DDR_Addr">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="DDR_Addr"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="IO" LEFT="2" NAME="DDR_ba" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_DDR_BankAddr">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="DDR_BankAddr"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="IO" NAME="DDR_cas_n" SIGIS="undef" SIGNAME="processing_system7_DDR_CAS_n">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="DDR_CAS_n"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="IO" NAME="DDR_ck_n" SIGIS="clk" SIGNAME="processing_system7_DDR_Clk_n">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="DDR_Clk_n"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="IO" NAME="DDR_ck_p" SIGIS="clk" SIGNAME="processing_system7_DDR_Clk">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="DDR_Clk"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="IO" NAME="DDR_cke" SIGIS="undef" SIGNAME="processing_system7_DDR_CKE">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="DDR_CKE"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="IO" NAME="DDR_cs_n" SIGIS="undef" SIGNAME="processing_system7_DDR_CS_n">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="DDR_CS_n"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="IO" LEFT="3" NAME="DDR_dm" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_DDR_DM">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="DDR_DM"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="IO" LEFT="31" NAME="DDR_dq" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_DDR_DQ">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="DDR_DQ"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="IO" LEFT="3" NAME="DDR_dqs_n" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_DDR_DQS_n">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="DDR_DQS_n"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="IO" LEFT="3" NAME="DDR_dqs_p" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_DDR_DQS">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="DDR_DQS"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="IO" NAME="DDR_odt" SIGIS="undef" SIGNAME="processing_system7_DDR_ODT">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="DDR_ODT"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="IO" NAME="DDR_ras_n" SIGIS="undef" SIGNAME="processing_system7_DDR_RAS_n">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="DDR_RAS_n"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="IO" NAME="DDR_reset_n" POLARITY="ACTIVE_LOW" SIGIS="rst" SIGNAME="processing_system7_DDR_DRSTB">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="DDR_DRSTB"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="IO" NAME="DDR_we_n" SIGIS="undef" SIGNAME="processing_system7_DDR_WEB">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="DDR_WEB"/>
      </CONNECTIONS>
    </PORT>
    <PORT CLKFREQUENCY="125000000" DIR="O" NAME="FCLK_CLK0" SIGIS="clk" SIGNAME="processing_system7_FCLK_CLK0">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="FCLK_CLK0"/>
      </CONNECTIONS>
    </PORT>
    <PORT CLKFREQUENCY="250000000" DIR="O" NAME="FCLK_CLK1" SIGIS="clk" SIGNAME="processing_system7_FCLK_CLK1">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="FCLK_CLK1"/>
      </CONNECTIONS>
    </PORT>
    <PORT CLKFREQUENCY="50000000" DIR="O" NAME="FCLK_CLK2" SIGIS="clk" SIGNAME="processing_system7_FCLK_CLK2">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="FCLK_CLK2"/>
      </CONNECTIONS>
    </PORT>
    <PORT CLKFREQUENCY="200000000" DIR="O" NAME="FCLK_CLK3" SIGIS="clk" SIGNAME="processing_system7_FCLK_CLK3">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="FCLK_CLK3"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="O" NAME="FCLK_RESET0_N" POLARITY="ACTIVE_LOW" SIGIS="rst" SIGNAME="processing_system7_FCLK_RESET0_N">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="FCLK_RESET0_N"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="O" NAME="FCLK_RESET1_N" POLARITY="ACTIVE_LOW" SIGIS="rst" SIGNAME="processing_system7_FCLK_RESET1_N">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="FCLK_RESET1_N"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="O" NAME="FCLK_RESET2_N" POLARITY="ACTIVE_LOW" SIGIS="rst" SIGNAME="processing_system7_FCLK_RESET2_N">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="FCLK_RESET2_N"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="O" NAME="FCLK_RESET3_N" POLARITY="ACTIVE_LOW" SIGIS="rst" SIGNAME="processing_system7_FCLK_RESET3_N">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="FCLK_RESET3_N"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="IO" NAME="FIXED_IO_ddr_vrn" SIGIS="undef" SIGNAME="processing_system7_DDR_VRN">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="DDR_VRN"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="IO" NAME="FIXED_IO_ddr_vrp" SIGIS="undef" SIGNAME="processing_system7_DDR_VRP">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="DDR_VRP"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="IO" LEFT="53" NAME="FIXED_IO_mio" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_MIO">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="MIO"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="IO" NAME="FIXED_IO_ps_clk" SIGIS="undef" SIGNAME="processing_system7_PS_CLK">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="PS_CLK"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="IO" NAME="FIXED_IO_ps_porb" SIGIS="undef" SIGNAME="processing_system7_PS_PORB">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="PS_PORB"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="IO" NAME="FIXED_IO_ps_srstb" SIGIS="undef" SIGNAME="processing_system7_PS_SRSTB">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="PS_SRSTB"/>
      </CONNECTIONS>
    </PORT>
    <PORT CLKFREQUENCY="125000000" DIR="I" NAME="M_AXI_GP0_ACLK" SIGIS="clk" SIGNAME="External_Ports_M_AXI_GP0_ACLK">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP0_ACLK"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="O" LEFT="31" NAME="M_AXI_GP0_araddr" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_ARADDR">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP0_ARADDR"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="O" LEFT="1" NAME="M_AXI_GP0_arburst" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_ARBURST">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP0_ARBURST"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="O" LEFT="3" NAME="M_AXI_GP0_arcache" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_ARCACHE">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP0_ARCACHE"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="O" LEFT="11" NAME="M_AXI_GP0_arid" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_ARID">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP0_ARID"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="O" LEFT="3" NAME="M_AXI_GP0_arlen" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_ARLEN">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP0_ARLEN"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="O" LEFT="1" NAME="M_AXI_GP0_arlock" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_ARLOCK">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP0_ARLOCK"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="O" LEFT="2" NAME="M_AXI_GP0_arprot" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_ARPROT">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP0_ARPROT"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="O" LEFT="3" NAME="M_AXI_GP0_arqos" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_ARQOS">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP0_ARQOS"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" NAME="M_AXI_GP0_arready" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_ARREADY">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP0_ARREADY"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="O" LEFT="2" NAME="M_AXI_GP0_arsize" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_ARSIZE">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP0_ARSIZE"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="O" NAME="M_AXI_GP0_arvalid" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_ARVALID">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP0_ARVALID"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="O" LEFT="31" NAME="M_AXI_GP0_awaddr" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_AWADDR">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP0_AWADDR"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="O" LEFT="1" NAME="M_AXI_GP0_awburst" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_AWBURST">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP0_AWBURST"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="O" LEFT="3" NAME="M_AXI_GP0_awcache" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_AWCACHE">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP0_AWCACHE"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="O" LEFT="11" NAME="M_AXI_GP0_awid" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_AWID">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP0_AWID"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="O" LEFT="3" NAME="M_AXI_GP0_awlen" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_AWLEN">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP0_AWLEN"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="O" LEFT="1" NAME="M_AXI_GP0_awlock" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_AWLOCK">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP0_AWLOCK"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="O" LEFT="2" NAME="M_AXI_GP0_awprot" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_AWPROT">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP0_AWPROT"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="O" LEFT="3" NAME="M_AXI_GP0_awqos" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_AWQOS">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP0_AWQOS"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" NAME="M_AXI_GP0_awready" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_AWREADY">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP0_AWREADY"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="O" LEFT="2" NAME="M_AXI_GP0_awsize" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_AWSIZE">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP0_AWSIZE"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="O" NAME="M_AXI_GP0_awvalid" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_AWVALID">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP0_AWVALID"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" LEFT="11" NAME="M_AXI_GP0_bid" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_BID">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP0_BID"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="O" NAME="M_AXI_GP0_bready" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_BREADY">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP0_BREADY"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" LEFT="1" NAME="M_AXI_GP0_bresp" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_BRESP">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP0_BRESP"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" NAME="M_AXI_GP0_bvalid" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_BVALID">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP0_BVALID"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" LEFT="31" NAME="M_AXI_GP0_rdata" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_RDATA">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP0_RDATA"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" LEFT="11" NAME="M_AXI_GP0_rid" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_RID">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP0_RID"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" NAME="M_AXI_GP0_rlast" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_RLAST">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP0_RLAST"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="O" NAME="M_AXI_GP0_rready" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_RREADY">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP0_RREADY"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" LEFT="1" NAME="M_AXI_GP0_rresp" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_RRESP">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP0_RRESP"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" NAME="M_AXI_GP0_rvalid" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_RVALID">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP0_RVALID"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="O" LEFT="31" NAME="M_AXI_GP0_wdata" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_WDATA">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP0_WDATA"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="O" LEFT="11" NAME="M_AXI_GP0_wid" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_WID">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP0_WID"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="O" NAME="M_AXI_GP0_wlast" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_WLAST">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP0_WLAST"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" NAME="M_AXI_GP0_wready" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_WREADY">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP0_WREADY"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="O" LEFT="3" NAME="M_AXI_GP0_wstrb" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_WSTRB">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP0_WSTRB"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="O" NAME="M_AXI_GP0_wvalid" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_WVALID">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP0_WVALID"/>
      </CONNECTIONS>
    </PORT>
    <PORT CLKFREQUENCY="125000000" DIR="I" NAME="S_AXI_HP0_aclk" SIGIS="clk" SIGNAME="External_Ports_S_AXI_HP0_aclk">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP0_ACLK"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" LEFT="31" NAME="S_AXI_HP0_araddr" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_ARADDR">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP0_ARADDR"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" LEFT="1" NAME="S_AXI_HP0_arburst" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_ARBURST">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP0_ARBURST"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" LEFT="3" NAME="S_AXI_HP0_arcache" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_ARCACHE">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP0_ARCACHE"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" LEFT="5" NAME="S_AXI_HP0_arid" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_ARID">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP0_ARID"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" LEFT="3" NAME="S_AXI_HP0_arlen" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_ARLEN">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP0_ARLEN"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" LEFT="1" NAME="S_AXI_HP0_arlock" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_ARLOCK">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP0_ARLOCK"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" LEFT="2" NAME="S_AXI_HP0_arprot" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_ARPROT">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP0_ARPROT"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" LEFT="3" NAME="S_AXI_HP0_arqos" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_ARQOS">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP0_ARQOS"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="O" NAME="S_AXI_HP0_arready" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_ARREADY">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP0_ARREADY"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" LEFT="2" NAME="S_AXI_HP0_arsize" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_ARSIZE">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP0_ARSIZE"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" NAME="S_AXI_HP0_arvalid" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_ARVALID">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP0_ARVALID"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" LEFT="31" NAME="S_AXI_HP0_awaddr" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_AWADDR">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP0_AWADDR"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" LEFT="1" NAME="S_AXI_HP0_awburst" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_AWBURST">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP0_AWBURST"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" LEFT="3" NAME="S_AXI_HP0_awcache" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_AWCACHE">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP0_AWCACHE"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" LEFT="5" NAME="S_AXI_HP0_awid" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_AWID">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP0_AWID"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" LEFT="3" NAME="S_AXI_HP0_awlen" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_AWLEN">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP0_AWLEN"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" LEFT="1" NAME="S_AXI_HP0_awlock" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_AWLOCK">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP0_AWLOCK"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" LEFT="2" NAME="S_AXI_HP0_awprot" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_AWPROT">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP0_AWPROT"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" LEFT="3" NAME="S_AXI_HP0_awqos" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_AWQOS">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP0_AWQOS"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="O" NAME="S_AXI_HP0_awready" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_AWREADY">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP0_AWREADY"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" LEFT="2" NAME="S_AXI_HP0_awsize" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_AWSIZE">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP0_AWSIZE"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" NAME="S_AXI_HP0_awvalid" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_AWVALID">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP0_AWVALID"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="O" LEFT="5" NAME="S_AXI_HP0_bid" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_BID">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP0_BID"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" NAME="S_AXI_HP0_bready" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_BREADY">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP0_BREADY"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="O" LEFT="1" NAME="S_AXI_HP0_bresp" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_BRESP">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP0_BRESP"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="O" NAME="S_AXI_HP0_bvalid" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_BVALID">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP0_BVALID"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="O" LEFT="63" NAME="S_AXI_HP0_rdata" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_RDATA">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP0_RDATA"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="O" LEFT="5" NAME="S_AXI_HP0_rid" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_RID">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP0_RID"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="O" NAME="S_AXI_HP0_rlast" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_RLAST">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP0_RLAST"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" NAME="S_AXI_HP0_rready" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_RREADY">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP0_RREADY"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="O" LEFT="1" NAME="S_AXI_HP0_rresp" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_RRESP">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP0_RRESP"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="O" NAME="S_AXI_HP0_rvalid" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_RVALID">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP0_RVALID"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" LEFT="63" NAME="S_AXI_HP0_wdata" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_WDATA">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP0_WDATA"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" LEFT="5" NAME="S_AXI_HP0_wid" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_WID">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP0_WID"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" NAME="S_AXI_HP0_wlast" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_WLAST">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP0_WLAST"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="O" NAME="S_AXI_HP0_wready" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_WREADY">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP0_WREADY"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" LEFT="7" NAME="S_AXI_HP0_wstrb" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_WSTRB">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP0_WSTRB"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" NAME="S_AXI_HP0_wvalid" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_WVALID">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP0_WVALID"/>
      </CONNECTIONS>
    </PORT>
    <PORT CLKFREQUENCY="125000000" DIR="I" NAME="S_AXI_HP1_aclk" SIGIS="clk" SIGNAME="External_Ports_S_AXI_HP1_aclk">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP1_ACLK"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" LEFT="31" NAME="S_AXI_HP1_araddr" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_ARADDR">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP1_ARADDR"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" LEFT="1" NAME="S_AXI_HP1_arburst" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_ARBURST">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP1_ARBURST"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" LEFT="3" NAME="S_AXI_HP1_arcache" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_ARCACHE">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP1_ARCACHE"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" LEFT="5" NAME="S_AXI_HP1_arid" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_ARID">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP1_ARID"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" LEFT="3" NAME="S_AXI_HP1_arlen" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_ARLEN">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP1_ARLEN"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" LEFT="1" NAME="S_AXI_HP1_arlock" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_ARLOCK">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP1_ARLOCK"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" LEFT="2" NAME="S_AXI_HP1_arprot" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_ARPROT">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP1_ARPROT"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" LEFT="3" NAME="S_AXI_HP1_arqos" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_ARQOS">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP1_ARQOS"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="O" NAME="S_AXI_HP1_arready" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_ARREADY">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP1_ARREADY"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" LEFT="2" NAME="S_AXI_HP1_arsize" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_ARSIZE">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP1_ARSIZE"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" NAME="S_AXI_HP1_arvalid" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_ARVALID">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP1_ARVALID"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" LEFT="31" NAME="S_AXI_HP1_awaddr" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_AWADDR">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP1_AWADDR"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" LEFT="1" NAME="S_AXI_HP1_awburst" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_AWBURST">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP1_AWBURST"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" LEFT="3" NAME="S_AXI_HP1_awcache" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_AWCACHE">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP1_AWCACHE"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" LEFT="5" NAME="S_AXI_HP1_awid" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_AWID">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP1_AWID"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" LEFT="3" NAME="S_AXI_HP1_awlen" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_AWLEN">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP1_AWLEN"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" LEFT="1" NAME="S_AXI_HP1_awlock" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_AWLOCK">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP1_AWLOCK"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" LEFT="2" NAME="S_AXI_HP1_awprot" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_AWPROT">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP1_AWPROT"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" LEFT="3" NAME="S_AXI_HP1_awqos" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_AWQOS">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP1_AWQOS"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="O" NAME="S_AXI_HP1_awready" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_AWREADY">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP1_AWREADY"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" LEFT="2" NAME="S_AXI_HP1_awsize" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_AWSIZE">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP1_AWSIZE"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" NAME="S_AXI_HP1_awvalid" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_AWVALID">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP1_AWVALID"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="O" LEFT="5" NAME="S_AXI_HP1_bid" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_BID">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP1_BID"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" NAME="S_AXI_HP1_bready" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_BREADY">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP1_BREADY"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="O" LEFT="1" NAME="S_AXI_HP1_bresp" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_BRESP">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP1_BRESP"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="O" NAME="S_AXI_HP1_bvalid" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_BVALID">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP1_BVALID"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="O" LEFT="63" NAME="S_AXI_HP1_rdata" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_RDATA">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP1_RDATA"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="O" LEFT="5" NAME="S_AXI_HP1_rid" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_RID">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP1_RID"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="O" NAME="S_AXI_HP1_rlast" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_RLAST">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP1_RLAST"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" NAME="S_AXI_HP1_rready" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_RREADY">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP1_RREADY"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="O" LEFT="1" NAME="S_AXI_HP1_rresp" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_RRESP">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP1_RRESP"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="O" NAME="S_AXI_HP1_rvalid" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_RVALID">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP1_RVALID"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" LEFT="63" NAME="S_AXI_HP1_wdata" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_WDATA">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP1_WDATA"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" LEFT="5" NAME="S_AXI_HP1_wid" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_WID">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP1_WID"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" NAME="S_AXI_HP1_wlast" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_WLAST">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP1_WLAST"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="O" NAME="S_AXI_HP1_wready" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_WREADY">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP1_WREADY"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" LEFT="7" NAME="S_AXI_HP1_wstrb" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_WSTRB">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP1_WSTRB"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" NAME="S_AXI_HP1_wvalid" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_WVALID">
      <CONNECTIONS>
        <CONNECTION INSTANCE="processing_system7" PORT="S_AXI_HP1_WVALID"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" NAME="Vaux0_v_n" SIGIS="undef" SIGNAME="xadc_vauxn0">
      <CONNECTIONS>
        <CONNECTION INSTANCE="xadc" PORT="vauxn0"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" NAME="Vaux0_v_p" SIGIS="undef" SIGNAME="xadc_vauxp0">
      <CONNECTIONS>
        <CONNECTION INSTANCE="xadc" PORT="vauxp0"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" NAME="Vaux1_v_n" SIGIS="undef" SIGNAME="xadc_vauxn1">
      <CONNECTIONS>
        <CONNECTION INSTANCE="xadc" PORT="vauxn1"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" NAME="Vaux1_v_p" SIGIS="undef" SIGNAME="xadc_vauxp1">
      <CONNECTIONS>
        <CONNECTION INSTANCE="xadc" PORT="vauxp1"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" NAME="Vaux8_v_n" SIGIS="undef" SIGNAME="xadc_vauxn8">
      <CONNECTIONS>
        <CONNECTION INSTANCE="xadc" PORT="vauxn8"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" NAME="Vaux8_v_p" SIGIS="undef" SIGNAME="xadc_vauxp8">
      <CONNECTIONS>
        <CONNECTION INSTANCE="xadc" PORT="vauxp8"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" NAME="Vaux9_v_n" SIGIS="undef" SIGNAME="xadc_vauxn9">
      <CONNECTIONS>
        <CONNECTION INSTANCE="xadc" PORT="vauxn9"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" NAME="Vaux9_v_p" SIGIS="undef" SIGNAME="xadc_vauxp9">
      <CONNECTIONS>
        <CONNECTION INSTANCE="xadc" PORT="vauxp9"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" NAME="Vp_Vn_v_n" SIGIS="undef" SIGNAME="xadc_vn_in">
      <CONNECTIONS>
        <CONNECTION INSTANCE="xadc" PORT="vn_in"/>
      </CONNECTIONS>
    </PORT>
    <PORT DIR="I" NAME="Vp_Vn_v_p" SIGIS="undef" SIGNAME="xadc_vp_in">
      <CONNECTIONS>
        <CONNECTION INSTANCE="xadc" PORT="vp_in"/>
      </CONNECTIONS>
    </PORT>
  </EXTERNALPORTS>

  <EXTERNALINTERFACES>
    <BUSINTERFACE BUSNAME="processing_system7_DDR" DATAWIDTH="8" NAME="DDR" TYPE="INITIATOR">
      <PARAMETER NAME="AXI_ARBITRATION_SCHEME" VALUE="TDM"/>
      <PARAMETER NAME="BURST_LENGTH" VALUE="8"/>
      <PARAMETER NAME="CAN_DEBUG" VALUE="false"/>
      <PARAMETER NAME="CAS_LATENCY" VALUE="11"/>
      <PARAMETER NAME="CAS_WRITE_LATENCY" VALUE="11"/>
      <PARAMETER NAME="CS_ENABLED" VALUE="true"/>
      <PARAMETER NAME="CUSTOM_PARTS"/>
      <PARAMETER NAME="DATA_MASK_ENABLED" VALUE="true"/>
      <PARAMETER NAME="DATA_WIDTH" VALUE="8"/>
      <PARAMETER NAME="MEMORY_PART"/>
      <PARAMETER NAME="MEMORY_TYPE" VALUE="COMPONENTS"/>
      <PARAMETER NAME="MEM_ADDR_MAP" VALUE="ROW_COLUMN_BANK"/>
      <PARAMETER NAME="SLOT" VALUE="Single"/>
      <PARAMETER NAME="TIMEPERIOD_PS" VALUE="1250"/>
      <PORTMAPS>
        <PORTMAP LOGICAL="ADDR" PHYSICAL="DDR_addr"/>
        <PORTMAP LOGICAL="BA" PHYSICAL="DDR_ba"/>
        <PORTMAP LOGICAL="CAS_N" PHYSICAL="DDR_cas_n"/>
        <PORTMAP LOGICAL="CKE" PHYSICAL="DDR_cke"/>
        <PORTMAP LOGICAL="CK_N" PHYSICAL="DDR_ck_n"/>
        <PORTMAP LOGICAL="CK_P" PHYSICAL="DDR_ck_p"/>
        <PORTMAP LOGICAL="CS_N" PHYSICAL="DDR_cs_n"/>
        <PORTMAP LOGICAL="DM" PHYSICAL="DDR_dm"/>
        <PORTMAP LOGICAL="DQ" PHYSICAL="DDR_dq"/>
        <PORTMAP LOGICAL="DQS_N" PHYSICAL="DDR_dqs_n"/>
        <PORTMAP LOGICAL="DQS_P" PHYSICAL="DDR_dqs_p"/>
        <PORTMAP LOGICAL="ODT" PHYSICAL="DDR_odt"/>
        <PORTMAP LOGICAL="RAS_N" PHYSICAL="DDR_ras_n"/>
        <PORTMAP LOGICAL="RESET_N" PHYSICAL="DDR_reset_n"/>
        <PORTMAP LOGICAL="WE_N" PHYSICAL="DDR_we_n"/>
      </PORTMAPS>
    </BUSINTERFACE>
    <BUSINTERFACE BUSNAME="processing_system7_FIXED_IO" NAME="FIXED_IO" TYPE="INITIATOR">
      <PARAMETER NAME="CAN_DEBUG" VALUE="false"/>
      <PORTMAPS>
        <PORTMAP LOGICAL="DDR_VRN" PHYSICAL="FIXED_IO_ddr_vrn"/>
        <PORTMAP LOGICAL="DDR_VRP" PHYSICAL="FIXED_IO_ddr_vrp"/>
        <PORTMAP LOGICAL="MIO" PHYSICAL="FIXED_IO_mio"/>
        <PORTMAP LOGICAL="PS_CLK" PHYSICAL="FIXED_IO_ps_clk"/>
        <PORTMAP LOGICAL="PS_PORB" PHYSICAL="FIXED_IO_ps_porb"/>
        <PORTMAP LOGICAL="PS_SRSTB" PHYSICAL="FIXED_IO_ps_srstb"/>
      </PORTMAPS>
    </BUSINTERFACE>
    <BUSINTERFACE BUSNAME="processing_system7_M_AXI_GP0" DATAWIDTH="32" NAME="M_AXI_GP0" TYPE="MASTER">
      <PARAMETER NAME="ADDR_WIDTH" VALUE="32"/>
      <PARAMETER NAME="ARUSER_WIDTH" VALUE="0"/>
      <PARAMETER NAME="AWUSER_WIDTH" VALUE="0"/>
      <PARAMETER NAME="BUSER_WIDTH" VALUE="0"/>
      <PARAMETER NAME="CLK_DOMAIN" VALUE="system_M_AXI_GP0_ACLK"/>
      <PARAMETER NAME="DATA_WIDTH" VALUE="32"/>
      <PARAMETER NAME="FREQ_HZ" VALUE="125000000"/>
      <PARAMETER NAME="HAS_BRESP" VALUE="1"/>
      <PARAMETER NAME="HAS_BURST" VALUE="1"/>
      <PARAMETER NAME="HAS_CACHE" VALUE="1"/>
      <PARAMETER NAME="HAS_LOCK" VALUE="1"/>
      <PARAMETER NAME="HAS_PROT" VALUE="1"/>
      <PARAMETER NAME="HAS_QOS" VALUE="1"/>
      <PARAMETER NAME="HAS_REGION" VALUE="0"/>
      <PARAMETER NAME="HAS_RRESP" VALUE="1"/>
      <PARAMETER NAME="HAS_WSTRB" VALUE="1"/>
      <PARAMETER NAME="ID_WIDTH" VALUE="12"/>
      <PARAMETER NAME="INSERT_VIP" VALUE="0"/>
      <PARAMETER NAME="MAX_BURST_LENGTH" VALUE="16"/>
      <PARAMETER NAME="NUM_READ_OUTSTANDING" VALUE="8"/>
      <PARAMETER NAME="NUM_READ_THREADS" VALUE="4"/>
      <PARAMETER NAME="NUM_WRITE_OUTSTANDING" VALUE="8"/>
      <PARAMETER NAME="NUM_WRITE_THREADS" VALUE="4"/>
      <PARAMETER NAME="PHASE" VALUE="0.0"/>
      <PARAMETER NAME="PROTOCOL" VALUE="AXI3"/>
      <PARAMETER NAME="READ_WRITE_MODE" VALUE="READ_WRITE"/>
      <PARAMETER NAME="RUSER_BITS_PER_BYTE" VALUE="0"/>
      <PARAMETER NAME="RUSER_WIDTH" VALUE="0"/>
      <PARAMETER NAME="SUPPORTS_NARROW_BURST" VALUE="0"/>
      <PARAMETER NAME="WUSER_BITS_PER_BYTE" VALUE="0"/>
      <PARAMETER NAME="WUSER_WIDTH" VALUE="0"/>
      <PORTMAPS>
        <PORTMAP LOGICAL="ARADDR" PHYSICAL="M_AXI_GP0_araddr"/>
        <PORTMAP LOGICAL="ARBURST" PHYSICAL="M_AXI_GP0_arburst"/>
        <PORTMAP LOGICAL="ARCACHE" PHYSICAL="M_AXI_GP0_arcache"/>
        <PORTMAP LOGICAL="ARID" PHYSICAL="M_AXI_GP0_arid"/>
        <PORTMAP LOGICAL="ARLEN" PHYSICAL="M_AXI_GP0_arlen"/>
        <PORTMAP LOGICAL="ARLOCK" PHYSICAL="M_AXI_GP0_arlock"/>
        <PORTMAP LOGICAL="ARPROT" PHYSICAL="M_AXI_GP0_arprot"/>
        <PORTMAP LOGICAL="ARQOS" PHYSICAL="M_AXI_GP0_arqos"/>
        <PORTMAP LOGICAL="ARREADY" PHYSICAL="M_AXI_GP0_arready"/>
        <PORTMAP LOGICAL="ARSIZE" PHYSICAL="M_AXI_GP0_arsize"/>
        <PORTMAP LOGICAL="ARVALID" PHYSICAL="M_AXI_GP0_arvalid"/>
        <PORTMAP LOGICAL="AWADDR" PHYSICAL="M_AXI_GP0_awaddr"/>
        <PORTMAP LOGICAL="AWBURST" PHYSICAL="M_AXI_GP0_awburst"/>
        <PORTMAP LOGICAL="AWCACHE" PHYSICAL="M_AXI_GP0_awcache"/>
        <PORTMAP LOGICAL="AWID" PHYSICAL="M_AXI_GP0_awid"/>
        <PORTMAP LOGICAL="AWLEN" PHYSICAL="M_AXI_GP0_awlen"/>
        <PORTMAP LOGICAL="AWLOCK" PHYSICAL="M_AXI_GP0_awlock"/>
        <PORTMAP LOGICAL="AWPROT" PHYSICAL="M_AXI_GP0_awprot"/>
        <PORTMAP LOGICAL="AWQOS" PHYSICAL="M_AXI_GP0_awqos"/>
        <PORTMAP LOGICAL="AWREADY" PHYSICAL="M_AXI_GP0_awready"/>
        <PORTMAP LOGICAL="AWSIZE" PHYSICAL="M_AXI_GP0_awsize"/>
        <PORTMAP LOGICAL="AWVALID" PHYSICAL="M_AXI_GP0_awvalid"/>
        <PORTMAP LOGICAL="BID" PHYSICAL="M_AXI_GP0_bid"/>
        <PORTMAP LOGICAL="BREADY" PHYSICAL="M_AXI_GP0_bready"/>
        <PORTMAP LOGICAL="BRESP" PHYSICAL="M_AXI_GP0_bresp"/>
        <PORTMAP LOGICAL="BVALID" PHYSICAL="M_AXI_GP0_bvalid"/>
        <PORTMAP LOGICAL="RDATA" PHYSICAL="M_AXI_GP0_rdata"/>
        <PORTMAP LOGICAL="RID" PHYSICAL="M_AXI_GP0_rid"/>
        <PORTMAP LOGICAL="RLAST" PHYSICAL="M_AXI_GP0_rlast"/>
        <PORTMAP LOGICAL="RREADY" PHYSICAL="M_AXI_GP0_rready"/>
        <PORTMAP LOGICAL="RRESP" PHYSICAL="M_AXI_GP0_rresp"/>
        <PORTMAP LOGICAL="RVALID" PHYSICAL="M_AXI_GP0_rvalid"/>
        <PORTMAP LOGICAL="WDATA" PHYSICAL="M_AXI_GP0_wdata"/>
        <PORTMAP LOGICAL="WID" PHYSICAL="M_AXI_GP0_wid"/>
        <PORTMAP LOGICAL="WLAST" PHYSICAL="M_AXI_GP0_wlast"/>
        <PORTMAP LOGICAL="WREADY" PHYSICAL="M_AXI_GP0_wready"/>
        <PORTMAP LOGICAL="WSTRB" PHYSICAL="M_AXI_GP0_wstrb"/>
        <PORTMAP LOGICAL="WVALID" PHYSICAL="M_AXI_GP0_wvalid"/>
      </PORTMAPS>
    </BUSINTERFACE>
    <BUSINTERFACE BUSNAME="External_Interface_S_AXI_HP0" DATAWIDTH="64" NAME="S_AXI_HP0" TYPE="SLAVE">
      <PARAMETER NAME="ADDR_WIDTH" VALUE="32"/>
      <PARAMETER NAME="ARUSER_WIDTH" VALUE="0"/>
      <PARAMETER NAME="AWUSER_WIDTH" VALUE="0"/>
      <PARAMETER NAME="BUSER_WIDTH" VALUE="0"/>
      <PARAMETER NAME="CLK_DOMAIN" VALUE="system_S_AXI_HP0_aclk"/>
      <PARAMETER NAME="DATA_WIDTH" VALUE="64"/>
      <PARAMETER NAME="FREQ_HZ" VALUE="125000000"/>
      <PARAMETER NAME="HAS_BRESP" VALUE="1"/>
      <PARAMETER NAME="HAS_BURST" VALUE="1"/>
      <PARAMETER NAME="HAS_CACHE" VALUE="1"/>
      <PARAMETER NAME="HAS_LOCK" VALUE="1"/>
      <PARAMETER NAME="HAS_PROT" VALUE="1"/>
      <PARAMETER NAME="HAS_QOS" VALUE="1"/>
      <PARAMETER NAME="HAS_REGION" VALUE="1"/>
      <PARAMETER NAME="HAS_RRESP" VALUE="1"/>
      <PARAMETER NAME="HAS_WSTRB" VALUE="1"/>
      <PARAMETER NAME="ID_WIDTH" VALUE="0"/>
      <PARAMETER NAME="INSERT_VIP" VALUE="0"/>
      <PARAMETER NAME="MAX_BURST_LENGTH" VALUE="16"/>
      <PARAMETER NAME="NUM_READ_OUTSTANDING" VALUE="1"/>
      <PARAMETER NAME="NUM_READ_THREADS" VALUE="1"/>
      <PARAMETER NAME="NUM_WRITE_OUTSTANDING" VALUE="1"/>
      <PARAMETER NAME="NUM_WRITE_THREADS" VALUE="1"/>
      <PARAMETER NAME="PHASE" VALUE="0.0"/>
      <PARAMETER NAME="PROTOCOL" VALUE="AXI3"/>
      <PARAMETER NAME="READ_WRITE_MODE" VALUE="READ_WRITE"/>
      <PARAMETER NAME="RUSER_BITS_PER_BYTE" VALUE="0"/>
      <PARAMETER NAME="RUSER_WIDTH" VALUE="0"/>
      <PARAMETER NAME="SUPPORTS_NARROW_BURST" VALUE="1"/>
      <PARAMETER NAME="WUSER_BITS_PER_BYTE" VALUE="0"/>
      <PARAMETER NAME="WUSER_WIDTH" VALUE="0"/>
      <PORTMAPS>
        <PORTMAP LOGICAL="ARADDR" PHYSICAL="S_AXI_HP0_araddr"/>
        <PORTMAP LOGICAL="ARBURST" PHYSICAL="S_AXI_HP0_arburst"/>
        <PORTMAP LOGICAL="ARCACHE" PHYSICAL="S_AXI_HP0_arcache"/>
        <PORTMAP LOGICAL="ARID" PHYSICAL="S_AXI_HP0_arid"/>
        <PORTMAP LOGICAL="ARLEN" PHYSICAL="S_AXI_HP0_arlen"/>
        <PORTMAP LOGICAL="ARLOCK" PHYSICAL="S_AXI_HP0_arlock"/>
        <PORTMAP LOGICAL="ARPROT" PHYSICAL="S_AXI_HP0_arprot"/>
        <PORTMAP LOGICAL="ARQOS" PHYSICAL="S_AXI_HP0_arqos"/>
        <PORTMAP LOGICAL="ARREADY" PHYSICAL="S_AXI_HP0_arready"/>
        <PORTMAP LOGICAL="ARSIZE" PHYSICAL="S_AXI_HP0_arsize"/>
        <PORTMAP LOGICAL="ARVALID" PHYSICAL="S_AXI_HP0_arvalid"/>
        <PORTMAP LOGICAL="AWADDR" PHYSICAL="S_AXI_HP0_awaddr"/>
        <PORTMAP LOGICAL="AWBURST" PHYSICAL="S_AXI_HP0_awburst"/>
        <PORTMAP LOGICAL="AWCACHE" PHYSICAL="S_AXI_HP0_awcache"/>
        <PORTMAP LOGICAL="AWID" PHYSICAL="S_AXI_HP0_awid"/>
        <PORTMAP LOGICAL="AWLEN" PHYSICAL="S_AXI_HP0_awlen"/>
        <PORTMAP LOGICAL="AWLOCK" PHYSICAL="S_AXI_HP0_awlock"/>
        <PORTMAP LOGICAL="AWPROT" PHYSICAL="S_AXI_HP0_awprot"/>
        <PORTMAP LOGICAL="AWQOS" PHYSICAL="S_AXI_HP0_awqos"/>
        <PORTMAP LOGICAL="AWREADY" PHYSICAL="S_AXI_HP0_awready"/>
        <PORTMAP LOGICAL="AWSIZE" PHYSICAL="S_AXI_HP0_awsize"/>
        <PORTMAP LOGICAL="AWVALID" PHYSICAL="S_AXI_HP0_awvalid"/>
        <PORTMAP LOGICAL="BID" PHYSICAL="S_AXI_HP0_bid"/>
        <PORTMAP LOGICAL="BREADY" PHYSICAL="S_AXI_HP0_bready"/>
        <PORTMAP LOGICAL="BRESP" PHYSICAL="S_AXI_HP0_bresp"/>
        <PORTMAP LOGICAL="BVALID" PHYSICAL="S_AXI_HP0_bvalid"/>
        <PORTMAP LOGICAL="RDATA" PHYSICAL="S_AXI_HP0_rdata"/>
        <PORTMAP LOGICAL="RID" PHYSICAL="S_AXI_HP0_rid"/>
        <PORTMAP LOGICAL="RLAST" PHYSICAL="S_AXI_HP0_rlast"/>
        <PORTMAP LOGICAL="RREADY" PHYSICAL="S_AXI_HP0_rready"/>
        <PORTMAP LOGICAL="RRESP" PHYSICAL="S_AXI_HP0_rresp"/>
        <PORTMAP LOGICAL="RVALID" PHYSICAL="S_AXI_HP0_rvalid"/>
        <PORTMAP LOGICAL="WDATA" PHYSICAL="S_AXI_HP0_wdata"/>
        <PORTMAP LOGICAL="WID" PHYSICAL="S_AXI_HP0_wid"/>
        <PORTMAP LOGICAL="WLAST" PHYSICAL="S_AXI_HP0_wlast"/>
        <PORTMAP LOGICAL="WREADY" PHYSICAL="S_AXI_HP0_wready"/>
        <PORTMAP LOGICAL="WSTRB" PHYSICAL="S_AXI_HP0_wstrb"/>
        <PORTMAP LOGICAL="WVALID" PHYSICAL="S_AXI_HP0_wvalid"/>
      </PORTMAPS>
      <MEMORYMAP>
        <MEMRANGE ADDRESSBLOCK="HP0_DDR_LOWOCM" BASENAME="C_BASEADDR" BASEVALUE="0x00000000" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x1FFFFFFF" INSTANCE="processing_system7" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" MASTERBUSINTERFACE="S_AXI_HP0" MEMTYPE="MEMORY" SLAVEBUSINTERFACE="S_AXI_HP0"/>
      </MEMORYMAP>
      <PERIPHERALS>
        <PERIPHERAL INSTANCE="processing_system7"/>
      </PERIPHERALS>
    </BUSINTERFACE>
    <BUSINTERFACE BUSNAME="External_Interface_S_AXI_HP1" DATAWIDTH="64" NAME="S_AXI_HP1" TYPE="SLAVE">
      <PARAMETER NAME="ADDR_WIDTH" VALUE="32"/>
      <PARAMETER NAME="ARUSER_WIDTH" VALUE="0"/>
      <PARAMETER NAME="AWUSER_WIDTH" VALUE="0"/>
      <PARAMETER NAME="BUSER_WIDTH" VALUE="0"/>
      <PARAMETER NAME="CLK_DOMAIN" VALUE="system_S_AXI_HP1_aclk"/>
      <PARAMETER NAME="DATA_WIDTH" VALUE="64"/>
      <PARAMETER NAME="FREQ_HZ" VALUE="125000000"/>
      <PARAMETER NAME="HAS_BRESP" VALUE="1"/>
      <PARAMETER NAME="HAS_BURST" VALUE="1"/>
      <PARAMETER NAME="HAS_CACHE" VALUE="1"/>
      <PARAMETER NAME="HAS_LOCK" VALUE="1"/>
      <PARAMETER NAME="HAS_PROT" VALUE="1"/>
      <PARAMETER NAME="HAS_QOS" VALUE="1"/>
      <PARAMETER NAME="HAS_REGION" VALUE="1"/>
      <PARAMETER NAME="HAS_RRESP" VALUE="1"/>
      <PARAMETER NAME="HAS_WSTRB" VALUE="1"/>
      <PARAMETER NAME="ID_WIDTH" VALUE="0"/>
      <PARAMETER NAME="INSERT_VIP" VALUE="0"/>
      <PARAMETER NAME="MAX_BURST_LENGTH" VALUE="16"/>
      <PARAMETER NAME="NUM_READ_OUTSTANDING" VALUE="1"/>
      <PARAMETER NAME="NUM_READ_THREADS" VALUE="1"/>
      <PARAMETER NAME="NUM_WRITE_OUTSTANDING" VALUE="1"/>
      <PARAMETER NAME="NUM_WRITE_THREADS" VALUE="1"/>
      <PARAMETER NAME="PHASE" VALUE="0.0"/>
      <PARAMETER NAME="PROTOCOL" VALUE="AXI3"/>
      <PARAMETER NAME="READ_WRITE_MODE" VALUE="READ_WRITE"/>
      <PARAMETER NAME="RUSER_BITS_PER_BYTE" VALUE="0"/>
      <PARAMETER NAME="RUSER_WIDTH" VALUE="0"/>
      <PARAMETER NAME="SUPPORTS_NARROW_BURST" VALUE="1"/>
      <PARAMETER NAME="WUSER_BITS_PER_BYTE" VALUE="0"/>
      <PARAMETER NAME="WUSER_WIDTH" VALUE="0"/>
      <PORTMAPS>
        <PORTMAP LOGICAL="ARADDR" PHYSICAL="S_AXI_HP1_araddr"/>
        <PORTMAP LOGICAL="ARBURST" PHYSICAL="S_AXI_HP1_arburst"/>
        <PORTMAP LOGICAL="ARCACHE" PHYSICAL="S_AXI_HP1_arcache"/>
        <PORTMAP LOGICAL="ARID" PHYSICAL="S_AXI_HP1_arid"/>
        <PORTMAP LOGICAL="ARLEN" PHYSICAL="S_AXI_HP1_arlen"/>
        <PORTMAP LOGICAL="ARLOCK" PHYSICAL="S_AXI_HP1_arlock"/>
        <PORTMAP LOGICAL="ARPROT" PHYSICAL="S_AXI_HP1_arprot"/>
        <PORTMAP LOGICAL="ARQOS" PHYSICAL="S_AXI_HP1_arqos"/>
        <PORTMAP LOGICAL="ARREADY" PHYSICAL="S_AXI_HP1_arready"/>
        <PORTMAP LOGICAL="ARSIZE" PHYSICAL="S_AXI_HP1_arsize"/>
        <PORTMAP LOGICAL="ARVALID" PHYSICAL="S_AXI_HP1_arvalid"/>
        <PORTMAP LOGICAL="AWADDR" PHYSICAL="S_AXI_HP1_awaddr"/>
        <PORTMAP LOGICAL="AWBURST" PHYSICAL="S_AXI_HP1_awburst"/>
        <PORTMAP LOGICAL="AWCACHE" PHYSICAL="S_AXI_HP1_awcache"/>
        <PORTMAP LOGICAL="AWID" PHYSICAL="S_AXI_HP1_awid"/>
        <PORTMAP LOGICAL="AWLEN" PHYSICAL="S_AXI_HP1_awlen"/>
        <PORTMAP LOGICAL="AWLOCK" PHYSICAL="S_AXI_HP1_awlock"/>
        <PORTMAP LOGICAL="AWPROT" PHYSICAL="S_AXI_HP1_awprot"/>
        <PORTMAP LOGICAL="AWQOS" PHYSICAL="S_AXI_HP1_awqos"/>
        <PORTMAP LOGICAL="AWREADY" PHYSICAL="S_AXI_HP1_awready"/>
        <PORTMAP LOGICAL="AWSIZE" PHYSICAL="S_AXI_HP1_awsize"/>
        <PORTMAP LOGICAL="AWVALID" PHYSICAL="S_AXI_HP1_awvalid"/>
        <PORTMAP LOGICAL="BID" PHYSICAL="S_AXI_HP1_bid"/>
        <PORTMAP LOGICAL="BREADY" PHYSICAL="S_AXI_HP1_bready"/>
        <PORTMAP LOGICAL="BRESP" PHYSICAL="S_AXI_HP1_bresp"/>
        <PORTMAP LOGICAL="BVALID" PHYSICAL="S_AXI_HP1_bvalid"/>
        <PORTMAP LOGICAL="RDATA" PHYSICAL="S_AXI_HP1_rdata"/>
        <PORTMAP LOGICAL="RID" PHYSICAL="S_AXI_HP1_rid"/>
        <PORTMAP LOGICAL="RLAST" PHYSICAL="S_AXI_HP1_rlast"/>
        <PORTMAP LOGICAL="RREADY" PHYSICAL="S_AXI_HP1_rready"/>
        <PORTMAP LOGICAL="RRESP" PHYSICAL="S_AXI_HP1_rresp"/>
        <PORTMAP LOGICAL="RVALID" PHYSICAL="S_AXI_HP1_rvalid"/>
        <PORTMAP LOGICAL="WDATA" PHYSICAL="S_AXI_HP1_wdata"/>
        <PORTMAP LOGICAL="WID" PHYSICAL="S_AXI_HP1_wid"/>
        <PORTMAP LOGICAL="WLAST" PHYSICAL="S_AXI_HP1_wlast"/>
        <PORTMAP LOGICAL="WREADY" PHYSICAL="S_AXI_HP1_wready"/>
        <PORTMAP LOGICAL="WSTRB" PHYSICAL="S_AXI_HP1_wstrb"/>
        <PORTMAP LOGICAL="WVALID" PHYSICAL="S_AXI_HP1_wvalid"/>
      </PORTMAPS>
      <MEMORYMAP>
        <MEMRANGE ADDRESSBLOCK="HP1_DDR_LOWOCM" BASENAME="C_BASEADDR" BASEVALUE="0x00000000" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x1FFFFFFF" INSTANCE="processing_system7" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" MASTERBUSINTERFACE="S_AXI_HP1" MEMTYPE="MEMORY" SLAVEBUSINTERFACE="S_AXI_HP1"/>
      </MEMORYMAP>
      <PERIPHERALS>
        <PERIPHERAL INSTANCE="processing_system7"/>
      </PERIPHERALS>
    </BUSINTERFACE>
    <BUSINTERFACE BUSNAME="External_Interface_Vaux0" NAME="Vaux0" TYPE="TARGET">
      <PORTMAPS>
        <PORTMAP LOGICAL="V_N" PHYSICAL="Vaux0_v_n"/>
        <PORTMAP LOGICAL="V_P" PHYSICAL="Vaux0_v_p"/>
      </PORTMAPS>
    </BUSINTERFACE>
    <BUSINTERFACE BUSNAME="External_Interface_Vaux1" NAME="Vaux1" TYPE="TARGET">
      <PORTMAPS>
        <PORTMAP LOGICAL="V_N" PHYSICAL="Vaux1_v_n"/>
        <PORTMAP LOGICAL="V_P" PHYSICAL="Vaux1_v_p"/>
      </PORTMAPS>
    </BUSINTERFACE>
    <BUSINTERFACE BUSNAME="External_Interface_Vaux8" NAME="Vaux8" TYPE="TARGET">
      <PORTMAPS>
        <PORTMAP LOGICAL="V_N" PHYSICAL="Vaux8_v_n"/>
        <PORTMAP LOGICAL="V_P" PHYSICAL="Vaux8_v_p"/>
      </PORTMAPS>
    </BUSINTERFACE>
    <BUSINTERFACE BUSNAME="External_Interface_Vaux9" NAME="Vaux9" TYPE="TARGET">
      <PORTMAPS>
        <PORTMAP LOGICAL="V_N" PHYSICAL="Vaux9_v_n"/>
        <PORTMAP LOGICAL="V_P" PHYSICAL="Vaux9_v_p"/>
      </PORTMAPS>
    </BUSINTERFACE>
    <BUSINTERFACE BUSNAME="External_Interface_Vp_Vn" NAME="Vp_Vn" TYPE="TARGET">
      <PORTMAPS>
        <PORTMAP LOGICAL="V_N" PHYSICAL="Vp_Vn_v_n"/>
        <PORTMAP LOGICAL="V_P" PHYSICAL="Vp_Vn_v_p"/>
      </PORTMAPS>
    </BUSINTERFACE>
  </EXTERNALINTERFACES>

  <MODULES>
    <MODULE COREREVISION="33" FULLNAME="/axi_protocol_converter_0" HWVERSION="2.1" INSTANCE="axi_protocol_converter_0" IPTYPE="BUS" IS_ENABLE="1" MODCLASS="BUS" MODTYPE="axi_protocol_converter" VLNV="xilinx.com:ip:axi_protocol_converter:2.1">
      <DOCUMENTS>
        <DOCUMENT SOURCE="http://www.xilinx.com/cgi-bin/docs/ipdoc?c=axi_interconnect;v=v2_1;d=pg059-axi-interconnect.pdf"/>
      </DOCUMENTS>
      <PARAMETERS>
        <PARAMETER NAME="C_AXI_ADDR_WIDTH" VALUE="32"/>
        <PARAMETER NAME="C_AXI_ARUSER_WIDTH" VALUE="1"/>
        <PARAMETER NAME="C_AXI_AWUSER_WIDTH" VALUE="1"/>
        <PARAMETER NAME="C_AXI_BUSER_WIDTH" VALUE="1"/>
        <PARAMETER NAME="C_AXI_DATA_WIDTH" VALUE="32"/>
        <PARAMETER NAME="C_AXI_ID_WIDTH" VALUE="12"/>
        <PARAMETER NAME="C_AXI_RUSER_WIDTH" VALUE="1"/>
        <PARAMETER NAME="C_AXI_SUPPORTS_READ" VALUE="1"/>
        <PARAMETER NAME="C_AXI_SUPPORTS_USER_SIGNALS" VALUE="0"/>
        <PARAMETER NAME="C_AXI_SUPPORTS_WRITE" VALUE="1"/>
        <PARAMETER NAME="C_AXI_WUSER_WIDTH" VALUE="1"/>
        <PARAMETER NAME="C_FAMILY" VALUE="zynq"/>
        <PARAMETER NAME="C_IGNORE_ID" VALUE="0"/>
        <PARAMETER NAME="C_M_AXI_PROTOCOL" VALUE="2"/>
        <PARAMETER NAME="C_S_AXI_PROTOCOL" VALUE="1"/>
        <PARAMETER NAME="C_TRANSLATION_MODE" VALUE="2"/>
        <PARAMETER NAME="ADDR_WIDTH" VALUE="32"/>
        <PARAMETER NAME="ARUSER_WIDTH" VALUE="0"/>
        <PARAMETER NAME="AWUSER_WIDTH" VALUE="0"/>
        <PARAMETER NAME="BUSER_WIDTH" VALUE="0"/>
        <PARAMETER NAME="Component_Name" VALUE="system_axi_protocol_converter_0_0"/>
        <PARAMETER NAME="DATA_WIDTH" VALUE="32"/>
        <PARAMETER NAME="ID_WIDTH" VALUE="12"/>
        <PARAMETER NAME="MI_PROTOCOL" VALUE="AXI4LITE"/>
        <PARAMETER NAME="READ_WRITE_MODE" VALUE="READ_WRITE"/>
        <PARAMETER NAME="RUSER_WIDTH" VALUE="0"/>
        <PARAMETER NAME="SI_PROTOCOL" VALUE="AXI3"/>
        <PARAMETER NAME="TRANSLATION_MODE" VALUE="2"/>
        <PARAMETER NAME="WUSER_WIDTH" VALUE="0"/>
        <PARAMETER NAME="EDK_IPTYPE" VALUE="BUS"/>
      </PARAMETERS>
      <PORTS>
        <PORT CLKFREQUENCY="200000000" DIR="I" NAME="aclk" SIGIS="clk" SIGNAME="processing_system7_FCLK_CLK3">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7" PORT="FCLK_CLK3"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="aresetn" POLARITY="ACTIVE_LOW" SIGIS="rst" SIGNAME="proc_sys_reset_interconnect_aresetn">
          <CONNECTIONS>
            <CONNECTION INSTANCE="proc_sys_reset" PORT="interconnect_aresetn"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="31" NAME="m_axi_araddr" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_m_axi_araddr">
          <CONNECTIONS>
            <CONNECTION INSTANCE="xadc" PORT="s_axi_araddr"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="m_axi_arready" SIGIS="undef" SIGNAME="axi_protocol_converter_0_m_axi_arready">
          <CONNECTIONS>
            <CONNECTION INSTANCE="xadc" PORT="s_axi_arready"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="m_axi_arvalid" SIGIS="undef" SIGNAME="axi_protocol_converter_0_m_axi_arvalid">
          <CONNECTIONS>
            <CONNECTION INSTANCE="xadc" PORT="s_axi_arvalid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="31" NAME="m_axi_awaddr" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_m_axi_awaddr">
          <CONNECTIONS>
            <CONNECTION INSTANCE="xadc" PORT="s_axi_awaddr"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="m_axi_awready" SIGIS="undef" SIGNAME="axi_protocol_converter_0_m_axi_awready">
          <CONNECTIONS>
            <CONNECTION INSTANCE="xadc" PORT="s_axi_awready"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="m_axi_awvalid" SIGIS="undef" SIGNAME="axi_protocol_converter_0_m_axi_awvalid">
          <CONNECTIONS>
            <CONNECTION INSTANCE="xadc" PORT="s_axi_awvalid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="m_axi_bready" SIGIS="undef" SIGNAME="axi_protocol_converter_0_m_axi_bready">
          <CONNECTIONS>
            <CONNECTION INSTANCE="xadc" PORT="s_axi_bready"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="1" NAME="m_axi_bresp" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_m_axi_bresp">
          <CONNECTIONS>
            <CONNECTION INSTANCE="xadc" PORT="s_axi_bresp"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="m_axi_bvalid" SIGIS="undef" SIGNAME="axi_protocol_converter_0_m_axi_bvalid">
          <CONNECTIONS>
            <CONNECTION INSTANCE="xadc" PORT="s_axi_bvalid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="31" NAME="m_axi_rdata" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_m_axi_rdata">
          <CONNECTIONS>
            <CONNECTION INSTANCE="xadc" PORT="s_axi_rdata"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="m_axi_rready" SIGIS="undef" SIGNAME="axi_protocol_converter_0_m_axi_rready">
          <CONNECTIONS>
            <CONNECTION INSTANCE="xadc" PORT="s_axi_rready"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="1" NAME="m_axi_rresp" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_m_axi_rresp">
          <CONNECTIONS>
            <CONNECTION INSTANCE="xadc" PORT="s_axi_rresp"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="m_axi_rvalid" SIGIS="undef" SIGNAME="axi_protocol_converter_0_m_axi_rvalid">
          <CONNECTIONS>
            <CONNECTION INSTANCE="xadc" PORT="s_axi_rvalid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="31" NAME="m_axi_wdata" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_m_axi_wdata">
          <CONNECTIONS>
            <CONNECTION INSTANCE="xadc" PORT="s_axi_wdata"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="m_axi_wready" SIGIS="undef" SIGNAME="axi_protocol_converter_0_m_axi_wready">
          <CONNECTIONS>
            <CONNECTION INSTANCE="xadc" PORT="s_axi_wready"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="3" NAME="m_axi_wstrb" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_m_axi_wstrb">
          <CONNECTIONS>
            <CONNECTION INSTANCE="xadc" PORT="s_axi_wstrb"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="m_axi_wvalid" SIGIS="undef" SIGNAME="axi_protocol_converter_0_m_axi_wvalid">
          <CONNECTIONS>
            <CONNECTION INSTANCE="xadc" PORT="s_axi_wvalid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="31" NAME="s_axi_araddr" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_araddr">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP1_ARADDR"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="1" NAME="s_axi_arburst" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_arburst">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP1_ARBURST"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="3" NAME="s_axi_arcache" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_arcache">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP1_ARCACHE"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="11" NAME="s_axi_arid" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_arid">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP1_ARID"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="3" NAME="s_axi_arlen" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_arlen">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP1_ARLEN"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="1" NAME="s_axi_arlock" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_arlock">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP1_ARLOCK"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="2" NAME="s_axi_arprot" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_arprot">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP1_ARPROT"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="3" NAME="s_axi_arqos" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_arqos">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP1_ARQOS"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="s_axi_arready" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_arready">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP1_ARREADY"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="2" NAME="s_axi_arsize" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_arsize">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP1_ARSIZE"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="s_axi_arvalid" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_arvalid">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP1_ARVALID"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="31" NAME="s_axi_awaddr" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_awaddr">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP1_AWADDR"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="1" NAME="s_axi_awburst" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_awburst">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP1_AWBURST"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="3" NAME="s_axi_awcache" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_awcache">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP1_AWCACHE"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="11" NAME="s_axi_awid" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_awid">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP1_AWID"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="3" NAME="s_axi_awlen" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_awlen">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP1_AWLEN"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="1" NAME="s_axi_awlock" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_awlock">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP1_AWLOCK"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="2" NAME="s_axi_awprot" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_awprot">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP1_AWPROT"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="3" NAME="s_axi_awqos" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_awqos">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP1_AWQOS"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="s_axi_awready" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_awready">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP1_AWREADY"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="2" NAME="s_axi_awsize" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_awsize">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP1_AWSIZE"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="s_axi_awvalid" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_awvalid">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP1_AWVALID"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="11" NAME="s_axi_bid" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_bid">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP1_BID"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="s_axi_bready" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_bready">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP1_BREADY"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="1" NAME="s_axi_bresp" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_bresp">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP1_BRESP"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="s_axi_bvalid" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_bvalid">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP1_BVALID"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="31" NAME="s_axi_rdata" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_rdata">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP1_RDATA"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="11" NAME="s_axi_rid" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_rid">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP1_RID"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="s_axi_rlast" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_rlast">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP1_RLAST"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="s_axi_rready" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_rready">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP1_RREADY"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="1" NAME="s_axi_rresp" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_rresp">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP1_RRESP"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="s_axi_rvalid" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_rvalid">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP1_RVALID"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="31" NAME="s_axi_wdata" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_wdata">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP1_WDATA"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="11" NAME="s_axi_wid" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_wid">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP1_WID"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="s_axi_wlast" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_wlast">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP1_WLAST"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="s_axi_wready" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_wready">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP1_WREADY"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="3" NAME="s_axi_wstrb" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_wstrb">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP1_WSTRB"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="s_axi_wvalid" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_wvalid">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP1_WVALID"/>
          </CONNECTIONS>
        </PORT>
      </PORTS>
      <BUSINTERFACES>
        <BUSINTERFACE BUSNAME="processing_system7_M_AXI_GP1" DATAWIDTH="32" NAME="S_AXI" TYPE="SLAVE" VLNV="xilinx.com:interface:aximm:1.0">
          <PARAMETER NAME="ADDR_WIDTH" VALUE="32"/>
          <PARAMETER NAME="ARUSER_WIDTH" VALUE="0"/>
          <PARAMETER NAME="AWUSER_WIDTH" VALUE="0"/>
          <PARAMETER NAME="BUSER_WIDTH" VALUE="0"/>
          <PARAMETER NAME="CLK_DOMAIN" VALUE="system_processing_system7_0_FCLK_CLK3"/>
          <PARAMETER NAME="DATA_WIDTH" VALUE="32"/>
          <PARAMETER NAME="FREQ_HZ" VALUE="200000000"/>
          <PARAMETER NAME="HAS_BRESP" VALUE="1"/>
          <PARAMETER NAME="HAS_BURST" VALUE="1"/>
          <PARAMETER NAME="HAS_CACHE" VALUE="1"/>
          <PARAMETER NAME="HAS_LOCK" VALUE="1"/>
          <PARAMETER NAME="HAS_PROT" VALUE="1"/>
          <PARAMETER NAME="HAS_QOS" VALUE="1"/>
          <PARAMETER NAME="HAS_REGION" VALUE="0"/>
          <PARAMETER NAME="HAS_RRESP" VALUE="1"/>
          <PARAMETER NAME="HAS_WSTRB" VALUE="1"/>
          <PARAMETER NAME="ID_WIDTH" VALUE="12"/>
          <PARAMETER NAME="INSERT_VIP" VALUE="0"/>
          <PARAMETER NAME="MAX_BURST_LENGTH" VALUE="16"/>
          <PARAMETER NAME="NUM_READ_OUTSTANDING" VALUE="8"/>
          <PARAMETER NAME="NUM_READ_THREADS" VALUE="4"/>
          <PARAMETER NAME="NUM_WRITE_OUTSTANDING" VALUE="8"/>
          <PARAMETER NAME="NUM_WRITE_THREADS" VALUE="4"/>
          <PARAMETER NAME="PHASE" VALUE="0.0"/>
          <PARAMETER NAME="PROTOCOL" VALUE="AXI3"/>
          <PARAMETER NAME="READ_WRITE_MODE" VALUE="READ_WRITE"/>
          <PARAMETER NAME="RUSER_BITS_PER_BYTE" VALUE="0"/>
          <PARAMETER NAME="RUSER_WIDTH" VALUE="0"/>
          <PARAMETER NAME="SUPPORTS_NARROW_BURST" VALUE="0"/>
          <PARAMETER NAME="WUSER_BITS_PER_BYTE" VALUE="0"/>
          <PARAMETER NAME="WUSER_WIDTH" VALUE="0"/>
          <PORTMAPS>
            <PORTMAP LOGICAL="ARADDR" PHYSICAL="s_axi_araddr"/>
            <PORTMAP LOGICAL="ARBURST" PHYSICAL="s_axi_arburst"/>
            <PORTMAP LOGICAL="ARCACHE" PHYSICAL="s_axi_arcache"/>
            <PORTMAP LOGICAL="ARID" PHYSICAL="s_axi_arid"/>
            <PORTMAP LOGICAL="ARLEN" PHYSICAL="s_axi_arlen"/>
            <PORTMAP LOGICAL="ARLOCK" PHYSICAL="s_axi_arlock"/>
            <PORTMAP LOGICAL="ARPROT" PHYSICAL="s_axi_arprot"/>
            <PORTMAP LOGICAL="ARQOS" PHYSICAL="s_axi_arqos"/>
            <PORTMAP LOGICAL="ARREADY" PHYSICAL="s_axi_arready"/>
            <PORTMAP LOGICAL="ARSIZE" PHYSICAL="s_axi_arsize"/>
            <PORTMAP LOGICAL="ARVALID" PHYSICAL="s_axi_arvalid"/>
            <PORTMAP LOGICAL="AWADDR" PHYSICAL="s_axi_awaddr"/>
            <PORTMAP LOGICAL="AWBURST" PHYSICAL="s_axi_awburst"/>
            <PORTMAP LOGICAL="AWCACHE" PHYSICAL="s_axi_awcache"/>
            <PORTMAP LOGICAL="AWID" PHYSICAL="s_axi_awid"/>
            <PORTMAP LOGICAL="AWLEN" PHYSICAL="s_axi_awlen"/>
            <PORTMAP LOGICAL="AWLOCK" PHYSICAL="s_axi_awlock"/>
            <PORTMAP LOGICAL="AWPROT" PHYSICAL="s_axi_awprot"/>
            <PORTMAP LOGICAL="AWQOS" PHYSICAL="s_axi_awqos"/>
            <PORTMAP LOGICAL="AWREADY" PHYSICAL="s_axi_awready"/>
            <PORTMAP LOGICAL="AWSIZE" PHYSICAL="s_axi_awsize"/>
            <PORTMAP LOGICAL="AWVALID" PHYSICAL="s_axi_awvalid"/>
            <PORTMAP LOGICAL="BID" PHYSICAL="s_axi_bid"/>
            <PORTMAP LOGICAL="BREADY" PHYSICAL="s_axi_bready"/>
            <PORTMAP LOGICAL="BRESP" PHYSICAL="s_axi_bresp"/>
            <PORTMAP LOGICAL="BVALID" PHYSICAL="s_axi_bvalid"/>
            <PORTMAP LOGICAL="RDATA" PHYSICAL="s_axi_rdata"/>
            <PORTMAP LOGICAL="RID" PHYSICAL="s_axi_rid"/>
            <PORTMAP LOGICAL="RLAST" PHYSICAL="s_axi_rlast"/>
            <PORTMAP LOGICAL="RREADY" PHYSICAL="s_axi_rready"/>
            <PORTMAP LOGICAL="RRESP" PHYSICAL="s_axi_rresp"/>
            <PORTMAP LOGICAL="RVALID" PHYSICAL="s_axi_rvalid"/>
            <PORTMAP LOGICAL="WDATA" PHYSICAL="s_axi_wdata"/>
            <PORTMAP LOGICAL="WID" PHYSICAL="s_axi_wid"/>
            <PORTMAP LOGICAL="WLAST" PHYSICAL="s_axi_wlast"/>
            <PORTMAP LOGICAL="WREADY" PHYSICAL="s_axi_wready"/>
            <PORTMAP LOGICAL="WSTRB" PHYSICAL="s_axi_wstrb"/>
            <PORTMAP LOGICAL="WVALID" PHYSICAL="s_axi_wvalid"/>
          </PORTMAPS>
        </BUSINTERFACE>
        <BUSINTERFACE BUSNAME="axi_protocol_converter_0_M_AXI" DATAWIDTH="32" NAME="M_AXI" TYPE="MASTER" VLNV="xilinx.com:interface:aximm:1.0">
          <PARAMETER NAME="ADDR_WIDTH" VALUE="32"/>
          <PARAMETER NAME="ARUSER_WIDTH" VALUE="0"/>
          <PARAMETER NAME="AWUSER_WIDTH" VALUE="0"/>
          <PARAMETER NAME="BUSER_WIDTH" VALUE="0"/>
          <PARAMETER NAME="CLK_DOMAIN" VALUE="system_processing_system7_0_FCLK_CLK3"/>
          <PARAMETER NAME="DATA_WIDTH" VALUE="32"/>
          <PARAMETER NAME="FREQ_HZ" VALUE="200000000"/>
          <PARAMETER NAME="HAS_BRESP" VALUE="1"/>
          <PARAMETER NAME="HAS_BURST" VALUE="0"/>
          <PARAMETER NAME="HAS_CACHE" VALUE="0"/>
          <PARAMETER NAME="HAS_LOCK" VALUE="0"/>
          <PARAMETER NAME="HAS_PROT" VALUE="1"/>
          <PARAMETER NAME="HAS_QOS" VALUE="0"/>
          <PARAMETER NAME="HAS_REGION" VALUE="0"/>
          <PARAMETER NAME="HAS_RRESP" VALUE="1"/>
          <PARAMETER NAME="HAS_WSTRB" VALUE="1"/>
          <PARAMETER NAME="ID_WIDTH" VALUE="0"/>
          <PARAMETER NAME="INSERT_VIP" VALUE="0"/>
          <PARAMETER NAME="MAX_BURST_LENGTH" VALUE="1"/>
          <PARAMETER NAME="NUM_READ_OUTSTANDING" VALUE="8"/>
          <PARAMETER NAME="NUM_READ_THREADS" VALUE="4"/>
          <PARAMETER NAME="NUM_WRITE_OUTSTANDING" VALUE="8"/>
          <PARAMETER NAME="NUM_WRITE_THREADS" VALUE="4"/>
          <PARAMETER NAME="PHASE" VALUE="0.0"/>
          <PARAMETER NAME="PROTOCOL" VALUE="AXI4LITE"/>
          <PARAMETER NAME="READ_WRITE_MODE" VALUE="READ_WRITE"/>
          <PARAMETER NAME="RUSER_BITS_PER_BYTE" VALUE="0"/>
          <PARAMETER NAME="RUSER_WIDTH" VALUE="0"/>
          <PARAMETER NAME="SUPPORTS_NARROW_BURST" VALUE="0"/>
          <PARAMETER NAME="WUSER_BITS_PER_BYTE" VALUE="0"/>
          <PARAMETER NAME="WUSER_WIDTH" VALUE="0"/>
          <PORTMAPS>
            <PORTMAP LOGICAL="ARADDR" PHYSICAL="m_axi_araddr"/>
            <PORTMAP LOGICAL="ARREADY" PHYSICAL="m_axi_arready"/>
            <PORTMAP LOGICAL="ARVALID" PHYSICAL="m_axi_arvalid"/>
            <PORTMAP LOGICAL="AWADDR" PHYSICAL="m_axi_awaddr"/>
            <PORTMAP LOGICAL="AWREADY" PHYSICAL="m_axi_awready"/>
            <PORTMAP LOGICAL="AWVALID" PHYSICAL="m_axi_awvalid"/>
            <PORTMAP LOGICAL="BREADY" PHYSICAL="m_axi_bready"/>
            <PORTMAP LOGICAL="BRESP" PHYSICAL="m_axi_bresp"/>
            <PORTMAP LOGICAL="BVALID" PHYSICAL="m_axi_bvalid"/>
            <PORTMAP LOGICAL="RDATA" PHYSICAL="m_axi_rdata"/>
            <PORTMAP LOGICAL="RREADY" PHYSICAL="m_axi_rready"/>
            <PORTMAP LOGICAL="RRESP" PHYSICAL="m_axi_rresp"/>
            <PORTMAP LOGICAL="RVALID" PHYSICAL="m_axi_rvalid"/>
            <PORTMAP LOGICAL="WDATA" PHYSICAL="m_axi_wdata"/>
            <PORTMAP LOGICAL="WREADY" PHYSICAL="m_axi_wready"/>
            <PORTMAP LOGICAL="WSTRB" PHYSICAL="m_axi_wstrb"/>
            <PORTMAP LOGICAL="WVALID" PHYSICAL="m_axi_wvalid"/>
          </PORTMAPS>
        </BUSINTERFACE>
      </BUSINTERFACES>
    </MODULE>
    <MODULE COREREVISION="16" FULLNAME="/proc_sys_reset" HWVERSION="5.0" INSTANCE="proc_sys_reset" IPTYPE="PERIPHERAL" IS_ENABLE="1" MODCLASS="PERIPHERAL" MODTYPE="proc_sys_reset" VLNV="xilinx.com:ip:proc_sys_reset:5.0">
      <DOCUMENTS>
        <DOCUMENT SOURCE="http://www.xilinx.com/cgi-bin/docs/ipdoc?c=proc_sys_reset;v=v5_0;d=pg164-proc-sys-reset.pdf"/>
      </DOCUMENTS>
      <PARAMETERS>
        <PARAMETER NAME="C_AUX_RESET_HIGH" VALUE="0"/>
        <PARAMETER NAME="C_AUX_RST_WIDTH" VALUE="4"/>
        <PARAMETER NAME="C_EXT_RESET_HIGH" VALUE="0"/>
        <PARAMETER NAME="C_EXT_RST_WIDTH" VALUE="1"/>
        <PARAMETER NAME="C_FAMILY" VALUE="zynq"/>
        <PARAMETER NAME="C_NUM_BUS_RST" VALUE="1"/>
        <PARAMETER NAME="C_NUM_INTERCONNECT_ARESETN" VALUE="1"/>
        <PARAMETER NAME="C_NUM_PERP_ARESETN" VALUE="1"/>
        <PARAMETER NAME="C_NUM_PERP_RST" VALUE="1"/>
        <PARAMETER NAME="Component_Name" VALUE="system_proc_sys_reset_0"/>
        <PARAMETER NAME="RESET_BOARD_INTERFACE" VALUE="Custom"/>
        <PARAMETER NAME="USE_BOARD_FLOW" VALUE="false"/>
        <PARAMETER NAME="EDK_IPTYPE" VALUE="PERIPHERAL"/>
      </PARAMETERS>
      <PORTS>
        <PORT DIR="I" NAME="aux_reset_in" POLARITY="ACTIVE_LOW" SIGIS="rst" SIGNAME="xlconstant_dout">
          <CONNECTIONS>
            <CONNECTION INSTANCE="xlconstant" PORT="dout"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="0" NAME="bus_struct_reset" POLARITY="ACTIVE_HIGH" RIGHT="0" SIGIS="rst"/>
        <PORT DIR="I" NAME="dcm_locked" SIGIS="undef"/>
        <PORT DIR="I" NAME="ext_reset_in" POLARITY="ACTIVE_LOW" SIGIS="rst" SIGNAME="processing_system7_FCLK_RESET3_N">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7" PORT="FCLK_RESET3_N"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="0" NAME="interconnect_aresetn" POLARITY="ACTIVE_LOW" RIGHT="0" SIGIS="rst" SIGNAME="proc_sys_reset_interconnect_aresetn">
          <CONNECTIONS>
            <CONNECTION INSTANCE="axi_protocol_converter_0" PORT="aresetn"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="mb_debug_sys_rst" POLARITY="ACTIVE_HIGH" SIGIS="rst"/>
        <PORT DIR="O" NAME="mb_reset" POLARITY="ACTIVE_HIGH" SIGIS="rst"/>
        <PORT DIR="O" LEFT="0" NAME="peripheral_aresetn" POLARITY="ACTIVE_LOW" RIGHT="0" SIGIS="rst" SIGNAME="proc_sys_reset_peripheral_aresetn">
          <CONNECTIONS>
            <CONNECTION INSTANCE="xadc" PORT="s_axi_aresetn"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="0" NAME="peripheral_reset" POLARITY="ACTIVE_HIGH" RIGHT="0" SIGIS="rst"/>
        <PORT CLKFREQUENCY="200000000" DIR="I" NAME="slowest_sync_clk" SIGIS="clk" SIGNAME="processing_system7_FCLK_CLK3">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7" PORT="FCLK_CLK3"/>
          </CONNECTIONS>
        </PORT>
      </PORTS>
      <BUSINTERFACES/>
    </MODULE>
    <MODULE CONFIGURABLE="TRUE" COREREVISION="6" FULLNAME="/processing_system7" HWVERSION="5.5" INSTANCE="processing_system7" IPTYPE="PERIPHERAL" IS_ENABLE="1" IS_PL="FALSE" MODTYPE="processing_system7" VLNV="xilinx.com:ip:processing_system7:5.5">
      <DOCUMENTS>
        <DOCUMENT SOURCE="http://www.xilinx.com/cgi-bin/docs/ipdoc?c=processing_system7;v=v5_3;d=pg082-processing-system7.pdf"/>
      </DOCUMENTS>
      <PARAMETERS>
        <PARAMETER NAME="C_DM_WIDTH" VALUE="4"/>
        <PARAMETER NAME="C_DQS_WIDTH" VALUE="4"/>
        <PARAMETER NAME="C_DQ_WIDTH" VALUE="32"/>
        <PARAMETER NAME="C_EMIO_GPIO_WIDTH" VALUE="64"/>
        <PARAMETER NAME="C_EN_EMIO_ENET0" VALUE="0"/>
        <PARAMETER NAME="C_EN_EMIO_ENET1" VALUE="0"/>
        <PARAMETER NAME="C_EN_EMIO_PJTAG" VALUE="0"/>
        <PARAMETER NAME="C_EN_EMIO_TRACE" VALUE="0"/>
        <PARAMETER NAME="C_FCLK_CLK0_BUF" VALUE="TRUE"/>
        <PARAMETER NAME="C_FCLK_CLK1_BUF" VALUE="TRUE"/>
        <PARAMETER NAME="C_FCLK_CLK2_BUF" VALUE="TRUE"/>
        <PARAMETER NAME="C_FCLK_CLK3_BUF" VALUE="TRUE"/>
        <PARAMETER NAME="C_GP0_EN_MODIFIABLE_TXN" VALUE="1"/>
        <PARAMETER NAME="C_GP1_EN_MODIFIABLE_TXN" VALUE="1"/>
        <PARAMETER NAME="C_INCLUDE_ACP_TRANS_CHECK" VALUE="0"/>
        <PARAMETER NAME="C_INCLUDE_TRACE_BUFFER" VALUE="0"/>
        <PARAMETER NAME="C_IRQ_F2P_MODE" VALUE="DIRECT"/>
        <PARAMETER NAME="C_MIO_PRIMITIVE" VALUE="54"/>
        <PARAMETER NAME="C_M_AXI_GP0_ENABLE_STATIC_REMAP" VALUE="0"/>
        <PARAMETER NAME="C_M_AXI_GP0_ID_WIDTH" VALUE="12"/>
        <PARAMETER NAME="C_M_AXI_GP0_THREAD_ID_WIDTH" VALUE="12"/>
        <PARAMETER NAME="C_M_AXI_GP1_ENABLE_STATIC_REMAP" VALUE="0"/>
        <PARAMETER NAME="C_M_AXI_GP1_ID_WIDTH" VALUE="12"/>
        <PARAMETER NAME="C_M_AXI_GP1_THREAD_ID_WIDTH" VALUE="12"/>
        <PARAMETER NAME="C_NUM_F2P_INTR_INPUTS" VALUE="1"/>
        <PARAMETER NAME="C_PACKAGE_NAME" VALUE="clg400"/>
        <PARAMETER NAME="C_PS7_SI_REV" VALUE="PRODUCTION"/>
        <PARAMETER NAME="C_S_AXI_ACP_ARUSER_VAL" VALUE="31"/>
        <PARAMETER NAME="C_S_AXI_ACP_AWUSER_VAL" VALUE="31"/>
        <PARAMETER NAME="C_S_AXI_ACP_ID_WIDTH" VALUE="3"/>
        <PARAMETER NAME="C_S_AXI_GP0_ID_WIDTH" VALUE="6"/>
        <PARAMETER NAME="C_S_AXI_GP1_ID_WIDTH" VALUE="6"/>
        <PARAMETER NAME="C_S_AXI_HP0_DATA_WIDTH" VALUE="64"/>
        <PARAMETER NAME="C_S_AXI_HP0_ID_WIDTH" VALUE="6"/>
        <PARAMETER NAME="C_S_AXI_HP1_DATA_WIDTH" VALUE="64"/>
        <PARAMETER NAME="C_S_AXI_HP1_ID_WIDTH" VALUE="6"/>
        <PARAMETER NAME="C_S_AXI_HP2_DATA_WIDTH" VALUE="64"/>
        <PARAMETER NAME="C_S_AXI_HP2_ID_WIDTH" VALUE="6"/>
        <PARAMETER NAME="C_S_AXI_HP3_DATA_WIDTH" VALUE="64"/>
        <PARAMETER NAME="C_S_AXI_HP3_ID_WIDTH" VALUE="6"/>
        <PARAMETER NAME="C_TRACE_BUFFER_CLOCK_DELAY" VALUE="12"/>
        <PARAMETER NAME="C_TRACE_BUFFER_FIFO_SIZE" VALUE="128"/>
        <PARAMETER NAME="C_TRACE_INTERNAL_WIDTH" VALUE="2"/>
        <PARAMETER NAME="C_TRACE_PIPELINE_WIDTH" VALUE="8"/>
        <PARAMETER NAME="C_USE_AXI_NONSECURE" VALUE="0"/>
        <PARAMETER NAME="C_USE_DEFAULT_ACP_USER_VAL" VALUE="0"/>
        <PARAMETER NAME="C_USE_M_AXI_GP0" VALUE="1"/>
        <PARAMETER NAME="C_USE_M_AXI_GP1" VALUE="1"/>
        <PARAMETER NAME="C_USE_S_AXI_ACP" VALUE="0"/>
        <PARAMETER NAME="C_USE_S_AXI_GP0" VALUE="0"/>
        <PARAMETER NAME="C_USE_S_AXI_GP1" VALUE="0"/>
        <PARAMETER NAME="C_USE_S_AXI_HP0" VALUE="1"/>
        <PARAMETER NAME="C_USE_S_AXI_HP1" VALUE="1"/>
        <PARAMETER NAME="C_USE_S_AXI_HP2" VALUE="0"/>
        <PARAMETER NAME="C_USE_S_AXI_HP3" VALUE="0"/>
        <PARAMETER NAME="USE_TRACE_DATA_EDGE_DETECTOR" VALUE="0"/>
        <PARAMETER NAME="Component_Name" VALUE="system_processing_system7_0"/>
        <PARAMETER NAME="PCW_ACT_APU_PERIPHERAL_FREQMHZ" VALUE="666.666687"/>
        <PARAMETER NAME="PCW_ACT_CAN0_PERIPHERAL_FREQMHZ" VALUE="23.8095"/>
        <PARAMETER NAME="PCW_ACT_CAN1_PERIPHERAL_FREQMHZ" VALUE="23.8095"/>
        <PARAMETER NAME="PCW_ACT_CAN_PERIPHERAL_FREQMHZ" VALUE="10.000000"/>
        <PARAMETER NAME="PCW_ACT_DCI_PERIPHERAL_FREQMHZ" VALUE="10.158730"/>
        <PARAMETER NAME="PCW_ACT_ENET0_PERIPHERAL_FREQMHZ" VALUE="125.000000"/>
        <PARAMETER NAME="PCW_ACT_ENET1_PERIPHERAL_FREQMHZ" VALUE="10.000000"/>
        <PARAMETER NAME="PCW_ACT_FPGA0_PERIPHERAL_FREQMHZ" VALUE="125.000000"/>
        <PARAMETER NAME="PCW_ACT_FPGA1_PERIPHERAL_FREQMHZ" VALUE="250.000000"/>
        <PARAMETER NAME="PCW_ACT_FPGA2_PERIPHERAL_FREQMHZ" VALUE="50.000000"/>
        <PARAMETER NAME="PCW_ACT_FPGA3_PERIPHERAL_FREQMHZ" VALUE="200.000000"/>
        <PARAMETER NAME="PCW_ACT_I2C_PERIPHERAL_FREQMHZ" VALUE="50"/>
        <PARAMETER NAME="PCW_ACT_PCAP_PERIPHERAL_FREQMHZ" VALUE="200.000000"/>
        <PARAMETER NAME="PCW_ACT_QSPI_PERIPHERAL_FREQMHZ" VALUE="125.000000"/>
        <PARAMETER NAME="PCW_ACT_SDIO_PERIPHERAL_FREQMHZ" VALUE="100.000000"/>
        <PARAMETER NAME="PCW_ACT_SMC_PERIPHERAL_FREQMHZ" VALUE="10.000000"/>
        <PARAMETER NAME="PCW_ACT_SPI_PERIPHERAL_FREQMHZ" VALUE="166.666672"/>
        <PARAMETER NAME="PCW_ACT_TPIU_PERIPHERAL_FREQMHZ" VALUE="200.000000"/>
        <PARAMETER NAME="PCW_ACT_TTC0_CLK0_PERIPHERAL_FREQMHZ" VALUE="111.111115"/>
        <PARAMETER NAME="PCW_ACT_TTC0_CLK1_PERIPHERAL_FREQMHZ" VALUE="111.111115"/>
        <PARAMETER NAME="PCW_ACT_TTC0_CLK2_PERIPHERAL_FREQMHZ" VALUE="111.111115"/>
        <PARAMETER NAME="PCW_ACT_TTC1_CLK0_PERIPHERAL_FREQMHZ" VALUE="111.111115"/>
        <PARAMETER NAME="PCW_ACT_TTC1_CLK1_PERIPHERAL_FREQMHZ" VALUE="111.111115"/>
        <PARAMETER NAME="PCW_ACT_TTC1_CLK2_PERIPHERAL_FREQMHZ" VALUE="111.111115"/>
        <PARAMETER NAME="PCW_ACT_TTC_PERIPHERAL_FREQMHZ" VALUE="50"/>
        <PARAMETER NAME="PCW_ACT_UART_PERIPHERAL_FREQMHZ" VALUE="100.000000"/>
        <PARAMETER NAME="PCW_ACT_USB0_PERIPHERAL_FREQMHZ" VALUE="60"/>
        <PARAMETER NAME="PCW_ACT_USB1_PERIPHERAL_FREQMHZ" VALUE="60"/>
        <PARAMETER NAME="PCW_ACT_WDT_PERIPHERAL_FREQMHZ" VALUE="111.111115"/>
        <PARAMETER NAME="PCW_APU_CLK_RATIO_ENABLE" VALUE="6:2:1"/>
        <PARAMETER NAME="PCW_APU_PERIPHERAL_FREQMHZ" VALUE="666.666666"/>
        <PARAMETER NAME="PCW_ARMPLL_CTRL_FBDIV" VALUE="40"/>
        <PARAMETER NAME="PCW_CAN0_BASEADDR" VALUE="0xE0008000"/>
        <PARAMETER NAME="PCW_CAN0_CAN0_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_CAN0_GRP_CLK_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_CAN0_GRP_CLK_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_CAN0_HIGHADDR" VALUE="0xE0008FFF"/>
        <PARAMETER NAME="PCW_CAN0_PERIPHERAL_CLKSRC" VALUE="External"/>
        <PARAMETER NAME="PCW_CAN0_PERIPHERAL_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_CAN0_PERIPHERAL_FREQMHZ" VALUE="-1"/>
        <PARAMETER NAME="PCW_CAN1_BASEADDR" VALUE="0xE0009000"/>
        <PARAMETER NAME="PCW_CAN1_CAN1_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_CAN1_GRP_CLK_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_CAN1_GRP_CLK_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_CAN1_HIGHADDR" VALUE="0xE0009FFF"/>
        <PARAMETER NAME="PCW_CAN1_PERIPHERAL_CLKSRC" VALUE="External"/>
        <PARAMETER NAME="PCW_CAN1_PERIPHERAL_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_CAN1_PERIPHERAL_FREQMHZ" VALUE="-1"/>
        <PARAMETER NAME="PCW_CAN_PERIPHERAL_CLKSRC" VALUE="IO PLL"/>
        <PARAMETER NAME="PCW_CAN_PERIPHERAL_DIVISOR0" VALUE="1"/>
        <PARAMETER NAME="PCW_CAN_PERIPHERAL_DIVISOR1" VALUE="1"/>
        <PARAMETER NAME="PCW_CAN_PERIPHERAL_FREQMHZ" VALUE="100"/>
        <PARAMETER NAME="PCW_CAN_PERIPHERAL_VALID" VALUE="0"/>
        <PARAMETER NAME="PCW_CLK0_FREQ" VALUE="125000000"/>
        <PARAMETER NAME="PCW_CLK1_FREQ" VALUE="250000000"/>
        <PARAMETER NAME="PCW_CLK2_FREQ" VALUE="50000000"/>
        <PARAMETER NAME="PCW_CLK3_FREQ" VALUE="200000000"/>
        <PARAMETER NAME="PCW_CORE0_FIQ_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_CORE0_IRQ_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_CORE1_FIQ_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_CORE1_IRQ_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_CPU_CPU_6X4X_MAX_RANGE" VALUE="667"/>
        <PARAMETER NAME="PCW_CPU_CPU_PLL_FREQMHZ" VALUE="1333.333"/>
        <PARAMETER NAME="PCW_CPU_PERIPHERAL_CLKSRC" VALUE="ARM PLL"/>
        <PARAMETER NAME="PCW_CPU_PERIPHERAL_DIVISOR0" VALUE="2"/>
        <PARAMETER NAME="PCW_CRYSTAL_PERIPHERAL_FREQMHZ" VALUE="33.333333"/>
        <PARAMETER NAME="PCW_DCI_PERIPHERAL_CLKSRC" VALUE="DDR PLL"/>
        <PARAMETER NAME="PCW_DCI_PERIPHERAL_DIVISOR0" VALUE="15"/>
        <PARAMETER NAME="PCW_DCI_PERIPHERAL_DIVISOR1" VALUE="7"/>
        <PARAMETER NAME="PCW_DCI_PERIPHERAL_FREQMHZ" VALUE="10.159"/>
        <PARAMETER NAME="PCW_DDRPLL_CTRL_FBDIV" VALUE="32"/>
        <PARAMETER NAME="PCW_DDR_DDR_PLL_FREQMHZ" VALUE="1066.667"/>
        <PARAMETER NAME="PCW_DDR_HPRLPR_QUEUE_PARTITION" VALUE="HPR(0)/LPR(32)"/>
        <PARAMETER NAME="PCW_DDR_HPR_TO_CRITICAL_PRIORITY_LEVEL" VALUE="15"/>
        <PARAMETER NAME="PCW_DDR_LPR_TO_CRITICAL_PRIORITY_LEVEL" VALUE="2"/>
        <PARAMETER NAME="PCW_DDR_PERIPHERAL_CLKSRC" VALUE="DDR PLL"/>
        <PARAMETER NAME="PCW_DDR_PERIPHERAL_DIVISOR0" VALUE="2"/>
        <PARAMETER NAME="PCW_DDR_PORT0_HPR_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_DDR_PORT1_HPR_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_DDR_PORT2_HPR_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_DDR_PORT3_HPR_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_DDR_PRIORITY_READPORT_0" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_DDR_PRIORITY_READPORT_1" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_DDR_PRIORITY_READPORT_2" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_DDR_PRIORITY_READPORT_3" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_DDR_PRIORITY_WRITEPORT_0" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_DDR_PRIORITY_WRITEPORT_1" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_DDR_PRIORITY_WRITEPORT_2" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_DDR_PRIORITY_WRITEPORT_3" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_DDR_RAM_BASEADDR" VALUE="0x00100000"/>
        <PARAMETER NAME="PCW_DDR_RAM_HIGHADDR" VALUE="0x1FFFFFFF"/>
        <PARAMETER NAME="PCW_DDR_WRITE_TO_CRITICAL_PRIORITY_LEVEL" VALUE="2"/>
        <PARAMETER NAME="PCW_DM_WIDTH" VALUE="4"/>
        <PARAMETER NAME="PCW_DQS_WIDTH" VALUE="4"/>
        <PARAMETER NAME="PCW_DQ_WIDTH" VALUE="32"/>
        <PARAMETER NAME="PCW_DUAL_PARALLEL_QSPI_DATA_MODE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_DUAL_STACK_QSPI_DATA_MODE" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_ENET0_BASEADDR" VALUE="0xE000B000"/>
        <PARAMETER NAME="PCW_ENET0_ENET0_IO" VALUE="MIO 16 .. 27"/>
        <PARAMETER NAME="PCW_ENET0_GRP_MDIO_ENABLE" VALUE="1"/>
        <PARAMETER NAME="PCW_ENET0_GRP_MDIO_IO" VALUE="EMIO"/>
        <PARAMETER NAME="PCW_ENET0_HIGHADDR" VALUE="0xE000BFFF"/>
        <PARAMETER NAME="PCW_ENET0_PERIPHERAL_CLKSRC" VALUE="IO PLL"/>
        <PARAMETER NAME="PCW_ENET0_PERIPHERAL_DIVISOR0" VALUE="8"/>
        <PARAMETER NAME="PCW_ENET0_PERIPHERAL_DIVISOR1" VALUE="1"/>
        <PARAMETER NAME="PCW_ENET0_PERIPHERAL_ENABLE" VALUE="1"/>
        <PARAMETER NAME="PCW_ENET0_PERIPHERAL_FREQMHZ" VALUE="1000 Mbps"/>
        <PARAMETER NAME="PCW_ENET0_RESET_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_ENET0_RESET_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_ENET1_BASEADDR" VALUE="0xE000C000"/>
        <PARAMETER NAME="PCW_ENET1_ENET1_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_ENET1_GRP_MDIO_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_ENET1_GRP_MDIO_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_ENET1_HIGHADDR" VALUE="0xE000CFFF"/>
        <PARAMETER NAME="PCW_ENET1_PERIPHERAL_CLKSRC" VALUE="IO PLL"/>
        <PARAMETER NAME="PCW_ENET1_PERIPHERAL_DIVISOR0" VALUE="1"/>
        <PARAMETER NAME="PCW_ENET1_PERIPHERAL_DIVISOR1" VALUE="1"/>
        <PARAMETER NAME="PCW_ENET1_PERIPHERAL_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_ENET1_PERIPHERAL_FREQMHZ" VALUE="1000 Mbps"/>
        <PARAMETER NAME="PCW_ENET1_RESET_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_ENET1_RESET_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_ENET_RESET_ENABLE" VALUE="1"/>
        <PARAMETER NAME="PCW_ENET_RESET_POLARITY" VALUE="Active Low"/>
        <PARAMETER NAME="PCW_ENET_RESET_SELECT" VALUE="Share reset pin"/>
        <PARAMETER NAME="PCW_EN_4K_TIMER" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_CAN0" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_CAN1" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_CLK0_PORT" VALUE="1"/>
        <PARAMETER NAME="PCW_EN_CLK1_PORT" VALUE="1"/>
        <PARAMETER NAME="PCW_EN_CLK2_PORT" VALUE="1"/>
        <PARAMETER NAME="PCW_EN_CLK3_PORT" VALUE="1"/>
        <PARAMETER NAME="PCW_EN_CLKTRIG0_PORT" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_CLKTRIG1_PORT" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_CLKTRIG2_PORT" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_CLKTRIG3_PORT" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_DDR" VALUE="1"/>
        <PARAMETER NAME="PCW_EN_EMIO_CAN0" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_EMIO_CAN1" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_EMIO_CD_SDIO0" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_EMIO_CD_SDIO1" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_EMIO_ENET0" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_EMIO_ENET1" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_EMIO_GPIO" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_EMIO_I2C0" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_EMIO_I2C1" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_EMIO_MODEM_UART0" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_EMIO_MODEM_UART1" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_EMIO_PJTAG" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_EMIO_SDIO0" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_EMIO_SDIO1" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_EMIO_SPI0" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_EMIO_SPI1" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_EMIO_SRAM_INT" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_EMIO_TRACE" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_EMIO_TTC0" VALUE="1"/>
        <PARAMETER NAME="PCW_EN_EMIO_TTC1" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_EMIO_UART0" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_EMIO_UART1" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_EMIO_WDT" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_EMIO_WP_SDIO0" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_EMIO_WP_SDIO1" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_ENET0" VALUE="1"/>
        <PARAMETER NAME="PCW_EN_ENET1" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_GPIO" VALUE="1"/>
        <PARAMETER NAME="PCW_EN_I2C0" VALUE="1"/>
        <PARAMETER NAME="PCW_EN_I2C1" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_MODEM_UART0" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_MODEM_UART1" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_PJTAG" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_PTP_ENET0" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_PTP_ENET1" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_QSPI" VALUE="1"/>
        <PARAMETER NAME="PCW_EN_RST0_PORT" VALUE="1"/>
        <PARAMETER NAME="PCW_EN_RST1_PORT" VALUE="1"/>
        <PARAMETER NAME="PCW_EN_RST2_PORT" VALUE="1"/>
        <PARAMETER NAME="PCW_EN_RST3_PORT" VALUE="1"/>
        <PARAMETER NAME="PCW_EN_SDIO0" VALUE="1"/>
        <PARAMETER NAME="PCW_EN_SDIO1" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_SMC" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_SPI0" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_SPI1" VALUE="1"/>
        <PARAMETER NAME="PCW_EN_TRACE" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_TTC0" VALUE="1"/>
        <PARAMETER NAME="PCW_EN_TTC1" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_UART0" VALUE="1"/>
        <PARAMETER NAME="PCW_EN_UART1" VALUE="1"/>
        <PARAMETER NAME="PCW_EN_USB0" VALUE="1"/>
        <PARAMETER NAME="PCW_EN_USB1" VALUE="0"/>
        <PARAMETER NAME="PCW_EN_WDT" VALUE="0"/>
        <PARAMETER NAME="PCW_FCLK0_PERIPHERAL_CLKSRC" VALUE="IO PLL"/>
        <PARAMETER NAME="PCW_FCLK0_PERIPHERAL_DIVISOR0" VALUE="4"/>
        <PARAMETER NAME="PCW_FCLK0_PERIPHERAL_DIVISOR1" VALUE="2"/>
        <PARAMETER NAME="PCW_FCLK1_PERIPHERAL_CLKSRC" VALUE="IO PLL"/>
        <PARAMETER NAME="PCW_FCLK1_PERIPHERAL_DIVISOR0" VALUE="2"/>
        <PARAMETER NAME="PCW_FCLK1_PERIPHERAL_DIVISOR1" VALUE="2"/>
        <PARAMETER NAME="PCW_FCLK2_PERIPHERAL_CLKSRC" VALUE="IO PLL"/>
        <PARAMETER NAME="PCW_FCLK2_PERIPHERAL_DIVISOR0" VALUE="5"/>
        <PARAMETER NAME="PCW_FCLK2_PERIPHERAL_DIVISOR1" VALUE="4"/>
        <PARAMETER NAME="PCW_FCLK3_PERIPHERAL_CLKSRC" VALUE="IO PLL"/>
        <PARAMETER NAME="PCW_FCLK3_PERIPHERAL_DIVISOR0" VALUE="5"/>
        <PARAMETER NAME="PCW_FCLK3_PERIPHERAL_DIVISOR1" VALUE="1"/>
        <PARAMETER NAME="PCW_FCLK_CLK0_BUF" VALUE="TRUE"/>
        <PARAMETER NAME="PCW_FCLK_CLK1_BUF" VALUE="TRUE"/>
        <PARAMETER NAME="PCW_FCLK_CLK2_BUF" VALUE="TRUE"/>
        <PARAMETER NAME="PCW_FCLK_CLK3_BUF" VALUE="TRUE"/>
        <PARAMETER NAME="PCW_FPGA0_PERIPHERAL_FREQMHZ" VALUE="125"/>
        <PARAMETER NAME="PCW_FPGA1_PERIPHERAL_FREQMHZ" VALUE="250"/>
        <PARAMETER NAME="PCW_FPGA2_PERIPHERAL_FREQMHZ" VALUE="50"/>
        <PARAMETER NAME="PCW_FPGA3_PERIPHERAL_FREQMHZ" VALUE="200"/>
        <PARAMETER NAME="PCW_FPGA_FCLK0_ENABLE" VALUE="1"/>
        <PARAMETER NAME="PCW_FPGA_FCLK1_ENABLE" VALUE="1"/>
        <PARAMETER NAME="PCW_FPGA_FCLK2_ENABLE" VALUE="1"/>
        <PARAMETER NAME="PCW_FPGA_FCLK3_ENABLE" VALUE="1"/>
        <PARAMETER NAME="PCW_FTM_CTI_IN0" VALUE="DISABLED"/>
        <PARAMETER NAME="PCW_FTM_CTI_IN1" VALUE="DISABLED"/>
        <PARAMETER NAME="PCW_FTM_CTI_IN2" VALUE="DISABLED"/>
        <PARAMETER NAME="PCW_FTM_CTI_IN3" VALUE="DISABLED"/>
        <PARAMETER NAME="PCW_FTM_CTI_OUT0" VALUE="DISABLED"/>
        <PARAMETER NAME="PCW_FTM_CTI_OUT1" VALUE="DISABLED"/>
        <PARAMETER NAME="PCW_FTM_CTI_OUT2" VALUE="DISABLED"/>
        <PARAMETER NAME="PCW_FTM_CTI_OUT3" VALUE="DISABLED"/>
        <PARAMETER NAME="PCW_GP0_EN_MODIFIABLE_TXN" VALUE="1"/>
        <PARAMETER NAME="PCW_GP0_NUM_READ_THREADS" VALUE="4"/>
        <PARAMETER NAME="PCW_GP0_NUM_WRITE_THREADS" VALUE="4"/>
        <PARAMETER NAME="PCW_GP1_EN_MODIFIABLE_TXN" VALUE="1"/>
        <PARAMETER NAME="PCW_GP1_NUM_READ_THREADS" VALUE="4"/>
        <PARAMETER NAME="PCW_GP1_NUM_WRITE_THREADS" VALUE="4"/>
        <PARAMETER NAME="PCW_GPIO_BASEADDR" VALUE="0xE000A000"/>
        <PARAMETER NAME="PCW_GPIO_EMIO_GPIO_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_GPIO_EMIO_GPIO_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_GPIO_EMIO_GPIO_WIDTH" VALUE="64"/>
        <PARAMETER NAME="PCW_GPIO_HIGHADDR" VALUE="0xE000AFFF"/>
        <PARAMETER NAME="PCW_GPIO_MIO_GPIO_ENABLE" VALUE="1"/>
        <PARAMETER NAME="PCW_GPIO_MIO_GPIO_IO" VALUE="MIO"/>
        <PARAMETER NAME="PCW_GPIO_PERIPHERAL_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_I2C0_BASEADDR" VALUE="0xE0004000"/>
        <PARAMETER NAME="PCW_I2C0_GRP_INT_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_I2C0_GRP_INT_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_I2C0_HIGHADDR" VALUE="0xE0004FFF"/>
        <PARAMETER NAME="PCW_I2C0_I2C0_IO" VALUE="MIO 50 .. 51"/>
        <PARAMETER NAME="PCW_I2C0_PERIPHERAL_ENABLE" VALUE="1"/>
        <PARAMETER NAME="PCW_I2C0_RESET_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_I2C0_RESET_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_I2C1_BASEADDR" VALUE="0xE0005000"/>
        <PARAMETER NAME="PCW_I2C1_GRP_INT_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_I2C1_GRP_INT_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_I2C1_HIGHADDR" VALUE="0xE0005FFF"/>
        <PARAMETER NAME="PCW_I2C1_I2C1_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_I2C1_PERIPHERAL_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_I2C1_RESET_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_I2C1_RESET_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_I2C_PERIPHERAL_FREQMHZ" VALUE="111.111115"/>
        <PARAMETER NAME="PCW_I2C_RESET_ENABLE" VALUE="1"/>
        <PARAMETER NAME="PCW_I2C_RESET_POLARITY" VALUE="Active Low"/>
        <PARAMETER NAME="PCW_I2C_RESET_SELECT" VALUE="Share reset pin"/>
        <PARAMETER NAME="PCW_IMPORT_BOARD_PRESET" VALUE="None"/>
        <PARAMETER NAME="PCW_INCLUDE_ACP_TRANS_CHECK" VALUE="0"/>
        <PARAMETER NAME="PCW_INCLUDE_TRACE_BUFFER" VALUE="0"/>
        <PARAMETER NAME="PCW_IOPLL_CTRL_FBDIV" VALUE="30"/>
        <PARAMETER NAME="PCW_IO_IO_PLL_FREQMHZ" VALUE="1000.000"/>
        <PARAMETER NAME="PCW_IRQ_F2P_INTR" VALUE="1"/>
        <PARAMETER NAME="PCW_IRQ_F2P_MODE" VALUE="DIRECT"/>
        <PARAMETER NAME="PCW_MIO_0_DIRECTION" VALUE="inout"/>
        <PARAMETER NAME="PCW_MIO_0_IOTYPE" VALUE="LVCMOS 3.3V"/>
        <PARAMETER NAME="PCW_MIO_0_PULLUP" VALUE="enabled"/>
        <PARAMETER NAME="PCW_MIO_0_SLEW" VALUE="slow"/>
        <PARAMETER NAME="PCW_MIO_10_DIRECTION" VALUE="inout"/>
        <PARAMETER NAME="PCW_MIO_10_IOTYPE" VALUE="LVCMOS 3.3V"/>
        <PARAMETER NAME="PCW_MIO_10_PULLUP" VALUE="enabled"/>
        <PARAMETER NAME="PCW_MIO_10_SLEW" VALUE="slow"/>
        <PARAMETER NAME="PCW_MIO_11_DIRECTION" VALUE="inout"/>
        <PARAMETER NAME="PCW_MIO_11_IOTYPE" VALUE="LVCMOS 3.3V"/>
        <PARAMETER NAME="PCW_MIO_11_PULLUP" VALUE="enabled"/>
        <PARAMETER NAME="PCW_MIO_11_SLEW" VALUE="slow"/>
        <PARAMETER NAME="PCW_MIO_12_DIRECTION" VALUE="inout"/>
        <PARAMETER NAME="PCW_MIO_12_IOTYPE" VALUE="LVCMOS 3.3V"/>
        <PARAMETER NAME="PCW_MIO_12_PULLUP" VALUE="enabled"/>
        <PARAMETER NAME="PCW_MIO_12_SLEW" VALUE="slow"/>
        <PARAMETER NAME="PCW_MIO_13_DIRECTION" VALUE="inout"/>
        <PARAMETER NAME="PCW_MIO_13_IOTYPE" VALUE="LVCMOS 3.3V"/>
        <PARAMETER NAME="PCW_MIO_13_PULLUP" VALUE="enabled"/>
        <PARAMETER NAME="PCW_MIO_13_SLEW" VALUE="slow"/>
        <PARAMETER NAME="PCW_MIO_14_DIRECTION" VALUE="in"/>
        <PARAMETER NAME="PCW_MIO_14_IOTYPE" VALUE="LVCMOS 3.3V"/>
        <PARAMETER NAME="PCW_MIO_14_PULLUP" VALUE="enabled"/>
        <PARAMETER NAME="PCW_MIO_14_SLEW" VALUE="slow"/>
        <PARAMETER NAME="PCW_MIO_15_DIRECTION" VALUE="out"/>
        <PARAMETER NAME="PCW_MIO_15_IOTYPE" VALUE="LVCMOS 3.3V"/>
        <PARAMETER NAME="PCW_MIO_15_PULLUP" VALUE="enabled"/>
        <PARAMETER NAME="PCW_MIO_15_SLEW" VALUE="slow"/>
        <PARAMETER NAME="PCW_MIO_16_DIRECTION" VALUE="out"/>
        <PARAMETER NAME="PCW_MIO_16_IOTYPE" VALUE="LVCMOS 2.5V"/>
        <PARAMETER NAME="PCW_MIO_16_PULLUP" VALUE="disabled"/>
        <PARAMETER NAME="PCW_MIO_16_SLEW" VALUE="fast"/>
        <PARAMETER NAME="PCW_MIO_17_DIRECTION" VALUE="out"/>
        <PARAMETER NAME="PCW_MIO_17_IOTYPE" VALUE="LVCMOS 2.5V"/>
        <PARAMETER NAME="PCW_MIO_17_PULLUP" VALUE="disabled"/>
        <PARAMETER NAME="PCW_MIO_17_SLEW" VALUE="fast"/>
        <PARAMETER NAME="PCW_MIO_18_DIRECTION" VALUE="out"/>
        <PARAMETER NAME="PCW_MIO_18_IOTYPE" VALUE="LVCMOS 2.5V"/>
        <PARAMETER NAME="PCW_MIO_18_PULLUP" VALUE="disabled"/>
        <PARAMETER NAME="PCW_MIO_18_SLEW" VALUE="fast"/>
        <PARAMETER NAME="PCW_MIO_19_DIRECTION" VALUE="out"/>
        <PARAMETER NAME="PCW_MIO_19_IOTYPE" VALUE="LVCMOS 2.5V"/>
        <PARAMETER NAME="PCW_MIO_19_PULLUP" VALUE="disabled"/>
        <PARAMETER NAME="PCW_MIO_19_SLEW" VALUE="fast"/>
        <PARAMETER NAME="PCW_MIO_1_DIRECTION" VALUE="out"/>
        <PARAMETER NAME="PCW_MIO_1_IOTYPE" VALUE="LVCMOS 3.3V"/>
        <PARAMETER NAME="PCW_MIO_1_PULLUP" VALUE="enabled"/>
        <PARAMETER NAME="PCW_MIO_1_SLEW" VALUE="slow"/>
        <PARAMETER NAME="PCW_MIO_20_DIRECTION" VALUE="out"/>
        <PARAMETER NAME="PCW_MIO_20_IOTYPE" VALUE="LVCMOS 2.5V"/>
        <PARAMETER NAME="PCW_MIO_20_PULLUP" VALUE="disabled"/>
        <PARAMETER NAME="PCW_MIO_20_SLEW" VALUE="fast"/>
        <PARAMETER NAME="PCW_MIO_21_DIRECTION" VALUE="out"/>
        <PARAMETER NAME="PCW_MIO_21_IOTYPE" VALUE="LVCMOS 2.5V"/>
        <PARAMETER NAME="PCW_MIO_21_PULLUP" VALUE="disabled"/>
        <PARAMETER NAME="PCW_MIO_21_SLEW" VALUE="fast"/>
        <PARAMETER NAME="PCW_MIO_22_DIRECTION" VALUE="in"/>
        <PARAMETER NAME="PCW_MIO_22_IOTYPE" VALUE="LVCMOS 2.5V"/>
        <PARAMETER NAME="PCW_MIO_22_PULLUP" VALUE="disabled"/>
        <PARAMETER NAME="PCW_MIO_22_SLEW" VALUE="fast"/>
        <PARAMETER NAME="PCW_MIO_23_DIRECTION" VALUE="in"/>
        <PARAMETER NAME="PCW_MIO_23_IOTYPE" VALUE="LVCMOS 2.5V"/>
        <PARAMETER NAME="PCW_MIO_23_PULLUP" VALUE="disabled"/>
        <PARAMETER NAME="PCW_MIO_23_SLEW" VALUE="fast"/>
        <PARAMETER NAME="PCW_MIO_24_DIRECTION" VALUE="in"/>
        <PARAMETER NAME="PCW_MIO_24_IOTYPE" VALUE="LVCMOS 2.5V"/>
        <PARAMETER NAME="PCW_MIO_24_PULLUP" VALUE="disabled"/>
        <PARAMETER NAME="PCW_MIO_24_SLEW" VALUE="fast"/>
        <PARAMETER NAME="PCW_MIO_25_DIRECTION" VALUE="in"/>
        <PARAMETER NAME="PCW_MIO_25_IOTYPE" VALUE="LVCMOS 2.5V"/>
        <PARAMETER NAME="PCW_MIO_25_PULLUP" VALUE="disabled"/>
        <PARAMETER NAME="PCW_MIO_25_SLEW" VALUE="fast"/>
        <PARAMETER NAME="PCW_MIO_26_DIRECTION" VALUE="in"/>
        <PARAMETER NAME="PCW_MIO_26_IOTYPE" VALUE="LVCMOS 2.5V"/>
        <PARAMETER NAME="PCW_MIO_26_PULLUP" VALUE="disabled"/>
        <PARAMETER NAME="PCW_MIO_26_SLEW" VALUE="fast"/>
        <PARAMETER NAME="PCW_MIO_27_DIRECTION" VALUE="in"/>
        <PARAMETER NAME="PCW_MIO_27_IOTYPE" VALUE="LVCMOS 2.5V"/>
        <PARAMETER NAME="PCW_MIO_27_PULLUP" VALUE="disabled"/>
        <PARAMETER NAME="PCW_MIO_27_SLEW" VALUE="fast"/>
        <PARAMETER NAME="PCW_MIO_28_DIRECTION" VALUE="inout"/>
        <PARAMETER NAME="PCW_MIO_28_IOTYPE" VALUE="LVCMOS 2.5V"/>
        <PARAMETER NAME="PCW_MIO_28_PULLUP" VALUE="disabled"/>
        <PARAMETER NAME="PCW_MIO_28_SLEW" VALUE="fast"/>
        <PARAMETER NAME="PCW_MIO_29_DIRECTION" VALUE="in"/>
        <PARAMETER NAME="PCW_MIO_29_IOTYPE" VALUE="LVCMOS 2.5V"/>
        <PARAMETER NAME="PCW_MIO_29_PULLUP" VALUE="disabled"/>
        <PARAMETER NAME="PCW_MIO_29_SLEW" VALUE="fast"/>
        <PARAMETER NAME="PCW_MIO_2_DIRECTION" VALUE="inout"/>
        <PARAMETER NAME="PCW_MIO_2_IOTYPE" VALUE="LVCMOS 3.3V"/>
        <PARAMETER NAME="PCW_MIO_2_PULLUP" VALUE="disabled"/>
        <PARAMETER NAME="PCW_MIO_2_SLEW" VALUE="slow"/>
        <PARAMETER NAME="PCW_MIO_30_DIRECTION" VALUE="out"/>
        <PARAMETER NAME="PCW_MIO_30_IOTYPE" VALUE="LVCMOS 2.5V"/>
        <PARAMETER NAME="PCW_MIO_30_PULLUP" VALUE="disabled"/>
        <PARAMETER NAME="PCW_MIO_30_SLEW" VALUE="fast"/>
        <PARAMETER NAME="PCW_MIO_31_DIRECTION" VALUE="in"/>
        <PARAMETER NAME="PCW_MIO_31_IOTYPE" VALUE="LVCMOS 2.5V"/>
        <PARAMETER NAME="PCW_MIO_31_PULLUP" VALUE="disabled"/>
        <PARAMETER NAME="PCW_MIO_31_SLEW" VALUE="fast"/>
        <PARAMETER NAME="PCW_MIO_32_DIRECTION" VALUE="inout"/>
        <PARAMETER NAME="PCW_MIO_32_IOTYPE" VALUE="LVCMOS 2.5V"/>
        <PARAMETER NAME="PCW_MIO_32_PULLUP" VALUE="disabled"/>
        <PARAMETER NAME="PCW_MIO_32_SLEW" VALUE="fast"/>
        <PARAMETER NAME="PCW_MIO_33_DIRECTION" VALUE="inout"/>
        <PARAMETER NAME="PCW_MIO_33_IOTYPE" VALUE="LVCMOS 2.5V"/>
        <PARAMETER NAME="PCW_MIO_33_PULLUP" VALUE="disabled"/>
        <PARAMETER NAME="PCW_MIO_33_SLEW" VALUE="fast"/>
        <PARAMETER NAME="PCW_MIO_34_DIRECTION" VALUE="inout"/>
        <PARAMETER NAME="PCW_MIO_34_IOTYPE" VALUE="LVCMOS 2.5V"/>
        <PARAMETER NAME="PCW_MIO_34_PULLUP" VALUE="disabled"/>
        <PARAMETER NAME="PCW_MIO_34_SLEW" VALUE="fast"/>
        <PARAMETER NAME="PCW_MIO_35_DIRECTION" VALUE="inout"/>
        <PARAMETER NAME="PCW_MIO_35_IOTYPE" VALUE="LVCMOS 2.5V"/>
        <PARAMETER NAME="PCW_MIO_35_PULLUP" VALUE="disabled"/>
        <PARAMETER NAME="PCW_MIO_35_SLEW" VALUE="fast"/>
        <PARAMETER NAME="PCW_MIO_36_DIRECTION" VALUE="in"/>
        <PARAMETER NAME="PCW_MIO_36_IOTYPE" VALUE="LVCMOS 2.5V"/>
        <PARAMETER NAME="PCW_MIO_36_PULLUP" VALUE="disabled"/>
        <PARAMETER NAME="PCW_MIO_36_SLEW" VALUE="fast"/>
        <PARAMETER NAME="PCW_MIO_37_DIRECTION" VALUE="inout"/>
        <PARAMETER NAME="PCW_MIO_37_IOTYPE" VALUE="LVCMOS 2.5V"/>
        <PARAMETER NAME="PCW_MIO_37_PULLUP" VALUE="disabled"/>
        <PARAMETER NAME="PCW_MIO_37_SLEW" VALUE="fast"/>
        <PARAMETER NAME="PCW_MIO_38_DIRECTION" VALUE="inout"/>
        <PARAMETER NAME="PCW_MIO_38_IOTYPE" VALUE="LVCMOS 2.5V"/>
        <PARAMETER NAME="PCW_MIO_38_PULLUP" VALUE="disabled"/>
        <PARAMETER NAME="PCW_MIO_38_SLEW" VALUE="fast"/>
        <PARAMETER NAME="PCW_MIO_39_DIRECTION" VALUE="inout"/>
        <PARAMETER NAME="PCW_MIO_39_IOTYPE" VALUE="LVCMOS 2.5V"/>
        <PARAMETER NAME="PCW_MIO_39_PULLUP" VALUE="disabled"/>
        <PARAMETER NAME="PCW_MIO_39_SLEW" VALUE="fast"/>
        <PARAMETER NAME="PCW_MIO_3_DIRECTION" VALUE="inout"/>
        <PARAMETER NAME="PCW_MIO_3_IOTYPE" VALUE="LVCMOS 3.3V"/>
        <PARAMETER NAME="PCW_MIO_3_PULLUP" VALUE="disabled"/>
        <PARAMETER NAME="PCW_MIO_3_SLEW" VALUE="slow"/>
        <PARAMETER NAME="PCW_MIO_40_DIRECTION" VALUE="inout"/>
        <PARAMETER NAME="PCW_MIO_40_IOTYPE" VALUE="LVCMOS 2.5V"/>
        <PARAMETER NAME="PCW_MIO_40_PULLUP" VALUE="enabled"/>
        <PARAMETER NAME="PCW_MIO_40_SLEW" VALUE="slow"/>
        <PARAMETER NAME="PCW_MIO_41_DIRECTION" VALUE="inout"/>
        <PARAMETER NAME="PCW_MIO_41_IOTYPE" VALUE="LVCMOS 2.5V"/>
        <PARAMETER NAME="PCW_MIO_41_PULLUP" VALUE="enabled"/>
        <PARAMETER NAME="PCW_MIO_41_SLEW" VALUE="slow"/>
        <PARAMETER NAME="PCW_MIO_42_DIRECTION" VALUE="inout"/>
        <PARAMETER NAME="PCW_MIO_42_IOTYPE" VALUE="LVCMOS 2.5V"/>
        <PARAMETER NAME="PCW_MIO_42_PULLUP" VALUE="enabled"/>
        <PARAMETER NAME="PCW_MIO_42_SLEW" VALUE="slow"/>
        <PARAMETER NAME="PCW_MIO_43_DIRECTION" VALUE="inout"/>
        <PARAMETER NAME="PCW_MIO_43_IOTYPE" VALUE="LVCMOS 2.5V"/>
        <PARAMETER NAME="PCW_MIO_43_PULLUP" VALUE="enabled"/>
        <PARAMETER NAME="PCW_MIO_43_SLEW" VALUE="slow"/>
        <PARAMETER NAME="PCW_MIO_44_DIRECTION" VALUE="inout"/>
        <PARAMETER NAME="PCW_MIO_44_IOTYPE" VALUE="LVCMOS 2.5V"/>
        <PARAMETER NAME="PCW_MIO_44_PULLUP" VALUE="enabled"/>
        <PARAMETER NAME="PCW_MIO_44_SLEW" VALUE="slow"/>
        <PARAMETER NAME="PCW_MIO_45_DIRECTION" VALUE="inout"/>
        <PARAMETER NAME="PCW_MIO_45_IOTYPE" VALUE="LVCMOS 2.5V"/>
        <PARAMETER NAME="PCW_MIO_45_PULLUP" VALUE="enabled"/>
        <PARAMETER NAME="PCW_MIO_45_SLEW" VALUE="slow"/>
        <PARAMETER NAME="PCW_MIO_46_DIRECTION" VALUE="in"/>
        <PARAMETER NAME="PCW_MIO_46_IOTYPE" VALUE="LVCMOS 2.5V"/>
        <PARAMETER NAME="PCW_MIO_46_PULLUP" VALUE="enabled"/>
        <PARAMETER NAME="PCW_MIO_46_SLEW" VALUE="slow"/>
        <PARAMETER NAME="PCW_MIO_47_DIRECTION" VALUE="in"/>
        <PARAMETER NAME="PCW_MIO_47_IOTYPE" VALUE="LVCMOS 2.5V"/>
        <PARAMETER NAME="PCW_MIO_47_PULLUP" VALUE="enabled"/>
        <PARAMETER NAME="PCW_MIO_47_SLEW" VALUE="slow"/>
        <PARAMETER NAME="PCW_MIO_48_DIRECTION" VALUE="out"/>
        <PARAMETER NAME="PCW_MIO_48_IOTYPE" VALUE="LVCMOS 2.5V"/>
        <PARAMETER NAME="PCW_MIO_48_PULLUP" VALUE="enabled"/>
        <PARAMETER NAME="PCW_MIO_48_SLEW" VALUE="slow"/>
        <PARAMETER NAME="PCW_MIO_49_DIRECTION" VALUE="inout"/>
        <PARAMETER NAME="PCW_MIO_49_IOTYPE" VALUE="LVCMOS 2.5V"/>
        <PARAMETER NAME="PCW_MIO_49_PULLUP" VALUE="enabled"/>
        <PARAMETER NAME="PCW_MIO_49_SLEW" VALUE="slow"/>
        <PARAMETER NAME="PCW_MIO_4_DIRECTION" VALUE="inout"/>
        <PARAMETER NAME="PCW_MIO_4_IOTYPE" VALUE="LVCMOS 3.3V"/>
        <PARAMETER NAME="PCW_MIO_4_PULLUP" VALUE="disabled"/>
        <PARAMETER NAME="PCW_MIO_4_SLEW" VALUE="slow"/>
        <PARAMETER NAME="PCW_MIO_50_DIRECTION" VALUE="inout"/>
        <PARAMETER NAME="PCW_MIO_50_IOTYPE" VALUE="LVCMOS 2.5V"/>
        <PARAMETER NAME="PCW_MIO_50_PULLUP" VALUE="enabled"/>
        <PARAMETER NAME="PCW_MIO_50_SLEW" VALUE="slow"/>
        <PARAMETER NAME="PCW_MIO_51_DIRECTION" VALUE="inout"/>
        <PARAMETER NAME="PCW_MIO_51_IOTYPE" VALUE="LVCMOS 2.5V"/>
        <PARAMETER NAME="PCW_MIO_51_PULLUP" VALUE="enabled"/>
        <PARAMETER NAME="PCW_MIO_51_SLEW" VALUE="slow"/>
        <PARAMETER NAME="PCW_MIO_52_DIRECTION" VALUE="inout"/>
        <PARAMETER NAME="PCW_MIO_52_IOTYPE" VALUE="LVCMOS 2.5V"/>
        <PARAMETER NAME="PCW_MIO_52_PULLUP" VALUE="enabled"/>
        <PARAMETER NAME="PCW_MIO_52_SLEW" VALUE="slow"/>
        <PARAMETER NAME="PCW_MIO_53_DIRECTION" VALUE="inout"/>
        <PARAMETER NAME="PCW_MIO_53_IOTYPE" VALUE="LVCMOS 2.5V"/>
        <PARAMETER NAME="PCW_MIO_53_PULLUP" VALUE="enabled"/>
        <PARAMETER NAME="PCW_MIO_53_SLEW" VALUE="slow"/>
        <PARAMETER NAME="PCW_MIO_5_DIRECTION" VALUE="inout"/>
        <PARAMETER NAME="PCW_MIO_5_IOTYPE" VALUE="LVCMOS 3.3V"/>
        <PARAMETER NAME="PCW_MIO_5_PULLUP" VALUE="disabled"/>
        <PARAMETER NAME="PCW_MIO_5_SLEW" VALUE="slow"/>
        <PARAMETER NAME="PCW_MIO_6_DIRECTION" VALUE="out"/>
        <PARAMETER NAME="PCW_MIO_6_IOTYPE" VALUE="LVCMOS 3.3V"/>
        <PARAMETER NAME="PCW_MIO_6_PULLUP" VALUE="disabled"/>
        <PARAMETER NAME="PCW_MIO_6_SLEW" VALUE="slow"/>
        <PARAMETER NAME="PCW_MIO_7_DIRECTION" VALUE="out"/>
        <PARAMETER NAME="PCW_MIO_7_IOTYPE" VALUE="LVCMOS 3.3V"/>
        <PARAMETER NAME="PCW_MIO_7_PULLUP" VALUE="disabled"/>
        <PARAMETER NAME="PCW_MIO_7_SLEW" VALUE="slow"/>
        <PARAMETER NAME="PCW_MIO_8_DIRECTION" VALUE="out"/>
        <PARAMETER NAME="PCW_MIO_8_IOTYPE" VALUE="LVCMOS 3.3V"/>
        <PARAMETER NAME="PCW_MIO_8_PULLUP" VALUE="disabled"/>
        <PARAMETER NAME="PCW_MIO_8_SLEW" VALUE="slow"/>
        <PARAMETER NAME="PCW_MIO_9_DIRECTION" VALUE="in"/>
        <PARAMETER NAME="PCW_MIO_9_IOTYPE" VALUE="LVCMOS 3.3V"/>
        <PARAMETER NAME="PCW_MIO_9_PULLUP" VALUE="enabled"/>
        <PARAMETER NAME="PCW_MIO_9_SLEW" VALUE="slow"/>
        <PARAMETER NAME="PCW_MIO_PRIMITIVE" VALUE="54"/>
        <PARAMETER NAME="PCW_MIO_TREE_PERIPHERALS" VALUE="GPIO#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#GPIO#UART 1#UART 1#SPI 1#SPI 1#SPI 1#SPI 1#UART 0#UART 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#SD 0#SD 0#SD 0#SD 0#SD 0#SD 0#SD 0#SD 0#USB Reset#GPIO#I2C 0#I2C 0#GPIO#GPIO"/>
        <PARAMETER NAME="PCW_MIO_TREE_SIGNALS" VALUE="gpio[0]#qspi0_ss_b#qspi0_io[0]#qspi0_io[1]#qspi0_io[2]#qspi0_io[3]/HOLD_B#qspi0_sclk#gpio[7]#tx#rx#mosi#miso#sclk#ss[0]#rx#tx#tx_clk#txd[0]#txd[1]#txd[2]#txd[3]#tx_ctl#rx_clk#rxd[0]#rxd[1]#rxd[2]#rxd[3]#rx_ctl#data[4]#dir#stp#nxt#data[0]#data[1]#data[2]#data[3]#clk#data[5]#data[6]#data[7]#clk#cmd#data[0]#data[1]#data[2]#data[3]#cd#wp#reset#gpio[49]#scl#sda#gpio[52]#gpio[53]"/>
        <PARAMETER NAME="PCW_M_AXI_GP0_ENABLE_STATIC_REMAP" VALUE="0"/>
        <PARAMETER NAME="PCW_M_AXI_GP0_FREQMHZ" VALUE="125"/>
        <PARAMETER NAME="PCW_M_AXI_GP0_ID_WIDTH" VALUE="12"/>
        <PARAMETER NAME="PCW_M_AXI_GP0_SUPPORT_NARROW_BURST" VALUE="0"/>
        <PARAMETER NAME="PCW_M_AXI_GP0_THREAD_ID_WIDTH" VALUE="12"/>
        <PARAMETER NAME="PCW_M_AXI_GP1_ENABLE_STATIC_REMAP" VALUE="0"/>
        <PARAMETER NAME="PCW_M_AXI_GP1_FREQMHZ" VALUE="200"/>
        <PARAMETER NAME="PCW_M_AXI_GP1_ID_WIDTH" VALUE="12"/>
        <PARAMETER NAME="PCW_M_AXI_GP1_SUPPORT_NARROW_BURST" VALUE="0"/>
        <PARAMETER NAME="PCW_M_AXI_GP1_THREAD_ID_WIDTH" VALUE="12"/>
        <PARAMETER NAME="PCW_NAND_CYCLES_T_AR" VALUE="1"/>
        <PARAMETER NAME="PCW_NAND_CYCLES_T_CLR" VALUE="1"/>
        <PARAMETER NAME="PCW_NAND_CYCLES_T_RC" VALUE="11"/>
        <PARAMETER NAME="PCW_NAND_CYCLES_T_REA" VALUE="1"/>
        <PARAMETER NAME="PCW_NAND_CYCLES_T_RR" VALUE="1"/>
        <PARAMETER NAME="PCW_NAND_CYCLES_T_WC" VALUE="11"/>
        <PARAMETER NAME="PCW_NAND_CYCLES_T_WP" VALUE="1"/>
        <PARAMETER NAME="PCW_NAND_GRP_D8_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_NAND_GRP_D8_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_NAND_NAND_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_NAND_PERIPHERAL_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_NOR_CS0_T_CEOE" VALUE="1"/>
        <PARAMETER NAME="PCW_NOR_CS0_T_PC" VALUE="1"/>
        <PARAMETER NAME="PCW_NOR_CS0_T_RC" VALUE="11"/>
        <PARAMETER NAME="PCW_NOR_CS0_T_TR" VALUE="1"/>
        <PARAMETER NAME="PCW_NOR_CS0_T_WC" VALUE="11"/>
        <PARAMETER NAME="PCW_NOR_CS0_T_WP" VALUE="1"/>
        <PARAMETER NAME="PCW_NOR_CS0_WE_TIME" VALUE="0"/>
        <PARAMETER NAME="PCW_NOR_CS1_T_CEOE" VALUE="1"/>
        <PARAMETER NAME="PCW_NOR_CS1_T_PC" VALUE="1"/>
        <PARAMETER NAME="PCW_NOR_CS1_T_RC" VALUE="11"/>
        <PARAMETER NAME="PCW_NOR_CS1_T_TR" VALUE="1"/>
        <PARAMETER NAME="PCW_NOR_CS1_T_WC" VALUE="11"/>
        <PARAMETER NAME="PCW_NOR_CS1_T_WP" VALUE="1"/>
        <PARAMETER NAME="PCW_NOR_CS1_WE_TIME" VALUE="0"/>
        <PARAMETER NAME="PCW_NOR_GRP_A25_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_NOR_GRP_A25_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_NOR_GRP_CS0_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_NOR_GRP_CS0_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_NOR_GRP_CS1_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_NOR_GRP_CS1_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_NOR_GRP_SRAM_CS0_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_NOR_GRP_SRAM_CS0_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_NOR_GRP_SRAM_CS1_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_NOR_GRP_SRAM_CS1_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_NOR_GRP_SRAM_INT_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_NOR_GRP_SRAM_INT_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_NOR_NOR_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_NOR_PERIPHERAL_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_NOR_SRAM_CS0_T_CEOE" VALUE="1"/>
        <PARAMETER NAME="PCW_NOR_SRAM_CS0_T_PC" VALUE="1"/>
        <PARAMETER NAME="PCW_NOR_SRAM_CS0_T_RC" VALUE="11"/>
        <PARAMETER NAME="PCW_NOR_SRAM_CS0_T_TR" VALUE="1"/>
        <PARAMETER NAME="PCW_NOR_SRAM_CS0_T_WC" VALUE="11"/>
        <PARAMETER NAME="PCW_NOR_SRAM_CS0_T_WP" VALUE="1"/>
        <PARAMETER NAME="PCW_NOR_SRAM_CS0_WE_TIME" VALUE="0"/>
        <PARAMETER NAME="PCW_NOR_SRAM_CS1_T_CEOE" VALUE="1"/>
        <PARAMETER NAME="PCW_NOR_SRAM_CS1_T_PC" VALUE="1"/>
        <PARAMETER NAME="PCW_NOR_SRAM_CS1_T_RC" VALUE="11"/>
        <PARAMETER NAME="PCW_NOR_SRAM_CS1_T_TR" VALUE="1"/>
        <PARAMETER NAME="PCW_NOR_SRAM_CS1_T_WC" VALUE="11"/>
        <PARAMETER NAME="PCW_NOR_SRAM_CS1_T_WP" VALUE="1"/>
        <PARAMETER NAME="PCW_NOR_SRAM_CS1_WE_TIME" VALUE="0"/>
        <PARAMETER NAME="PCW_NUM_F2P_INTR_INPUTS" VALUE="1"/>
        <PARAMETER NAME="PCW_OVERRIDE_BASIC_CLOCK" VALUE="0"/>
        <PARAMETER NAME="PCW_P2F_CAN0_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_P2F_CAN1_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_P2F_CTI_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_P2F_DMAC0_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_P2F_DMAC1_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_P2F_DMAC2_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_P2F_DMAC3_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_P2F_DMAC4_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_P2F_DMAC5_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_P2F_DMAC6_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_P2F_DMAC7_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_P2F_DMAC_ABORT_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_P2F_ENET0_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_P2F_ENET1_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_P2F_GPIO_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_P2F_I2C0_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_P2F_I2C1_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_P2F_QSPI_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_P2F_SDIO0_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_P2F_SDIO1_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_P2F_SMC_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_P2F_SPI0_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_P2F_SPI1_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_P2F_UART0_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_P2F_UART1_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_P2F_USB0_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_P2F_USB1_INTR" VALUE="0"/>
        <PARAMETER NAME="PCW_PACKAGE_DDR_BOARD_DELAY0" VALUE="0.080"/>
        <PARAMETER NAME="PCW_PACKAGE_DDR_BOARD_DELAY1" VALUE="0.063"/>
        <PARAMETER NAME="PCW_PACKAGE_DDR_BOARD_DELAY2" VALUE="0.057"/>
        <PARAMETER NAME="PCW_PACKAGE_DDR_BOARD_DELAY3" VALUE="0.068"/>
        <PARAMETER NAME="PCW_PACKAGE_DDR_DQS_TO_CLK_DELAY_0" VALUE="-0.047"/>
        <PARAMETER NAME="PCW_PACKAGE_DDR_DQS_TO_CLK_DELAY_1" VALUE="-0.025"/>
        <PARAMETER NAME="PCW_PACKAGE_DDR_DQS_TO_CLK_DELAY_2" VALUE="-0.006"/>
        <PARAMETER NAME="PCW_PACKAGE_DDR_DQS_TO_CLK_DELAY_3" VALUE="-0.017"/>
        <PARAMETER NAME="PCW_PACKAGE_NAME" VALUE="clg400"/>
        <PARAMETER NAME="PCW_PCAP_PERIPHERAL_CLKSRC" VALUE="IO PLL"/>
        <PARAMETER NAME="PCW_PCAP_PERIPHERAL_DIVISOR0" VALUE="5"/>
        <PARAMETER NAME="PCW_PCAP_PERIPHERAL_FREQMHZ" VALUE="200"/>
        <PARAMETER NAME="PCW_PERIPHERAL_BOARD_PRESET" VALUE="None"/>
        <PARAMETER NAME="PCW_PJTAG_PERIPHERAL_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_PJTAG_PJTAG_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_PLL_BYPASSMODE_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_PRESET_BANK0_VOLTAGE" VALUE="LVCMOS 3.3V"/>
        <PARAMETER NAME="PCW_PRESET_BANK1_VOLTAGE" VALUE="LVCMOS 2.5V"/>
        <PARAMETER NAME="PCW_PS7_SI_REV" VALUE="PRODUCTION"/>
        <PARAMETER NAME="PCW_QSPI_GRP_FBCLK_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_QSPI_GRP_FBCLK_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_QSPI_GRP_IO1_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_QSPI_GRP_IO1_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_QSPI_GRP_SINGLE_SS_ENABLE" VALUE="1"/>
        <PARAMETER NAME="PCW_QSPI_GRP_SINGLE_SS_IO" VALUE="MIO 1 .. 6"/>
        <PARAMETER NAME="PCW_QSPI_GRP_SS1_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_QSPI_GRP_SS1_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_QSPI_INTERNAL_HIGHADDRESS" VALUE="0xFCFFFFFF"/>
        <PARAMETER NAME="PCW_QSPI_PERIPHERAL_CLKSRC" VALUE="IO PLL"/>
        <PARAMETER NAME="PCW_QSPI_PERIPHERAL_DIVISOR0" VALUE="8"/>
        <PARAMETER NAME="PCW_QSPI_PERIPHERAL_ENABLE" VALUE="1"/>
        <PARAMETER NAME="PCW_QSPI_PERIPHERAL_FREQMHZ" VALUE="125"/>
        <PARAMETER NAME="PCW_QSPI_QSPI_IO" VALUE="MIO 1 .. 6"/>
        <PARAMETER NAME="PCW_SD0_GRP_CD_ENABLE" VALUE="1"/>
        <PARAMETER NAME="PCW_SD0_GRP_CD_IO" VALUE="MIO 46"/>
        <PARAMETER NAME="PCW_SD0_GRP_POW_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_SD0_GRP_POW_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_SD0_GRP_WP_ENABLE" VALUE="1"/>
        <PARAMETER NAME="PCW_SD0_GRP_WP_IO" VALUE="MIO 47"/>
        <PARAMETER NAME="PCW_SD0_PERIPHERAL_ENABLE" VALUE="1"/>
        <PARAMETER NAME="PCW_SD0_SD0_IO" VALUE="MIO 40 .. 45"/>
        <PARAMETER NAME="PCW_SD1_GRP_CD_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_SD1_GRP_CD_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_SD1_GRP_POW_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_SD1_GRP_POW_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_SD1_GRP_WP_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_SD1_GRP_WP_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_SD1_PERIPHERAL_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_SD1_SD1_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_SDIO0_BASEADDR" VALUE="0xE0100000"/>
        <PARAMETER NAME="PCW_SDIO0_HIGHADDR" VALUE="0xE0100FFF"/>
        <PARAMETER NAME="PCW_SDIO1_BASEADDR" VALUE="0xE0101000"/>
        <PARAMETER NAME="PCW_SDIO1_HIGHADDR" VALUE="0xE0101FFF"/>
        <PARAMETER NAME="PCW_SDIO_PERIPHERAL_CLKSRC" VALUE="IO PLL"/>
        <PARAMETER NAME="PCW_SDIO_PERIPHERAL_DIVISOR0" VALUE="10"/>
        <PARAMETER NAME="PCW_SDIO_PERIPHERAL_FREQMHZ" VALUE="100"/>
        <PARAMETER NAME="PCW_SDIO_PERIPHERAL_VALID" VALUE="1"/>
        <PARAMETER NAME="PCW_SINGLE_QSPI_DATA_MODE" VALUE="x4"/>
        <PARAMETER NAME="PCW_SMC_CYCLE_T0" VALUE="NA"/>
        <PARAMETER NAME="PCW_SMC_CYCLE_T1" VALUE="NA"/>
        <PARAMETER NAME="PCW_SMC_CYCLE_T2" VALUE="NA"/>
        <PARAMETER NAME="PCW_SMC_CYCLE_T3" VALUE="NA"/>
        <PARAMETER NAME="PCW_SMC_CYCLE_T4" VALUE="NA"/>
        <PARAMETER NAME="PCW_SMC_CYCLE_T5" VALUE="NA"/>
        <PARAMETER NAME="PCW_SMC_CYCLE_T6" VALUE="NA"/>
        <PARAMETER NAME="PCW_SMC_PERIPHERAL_CLKSRC" VALUE="IO PLL"/>
        <PARAMETER NAME="PCW_SMC_PERIPHERAL_DIVISOR0" VALUE="1"/>
        <PARAMETER NAME="PCW_SMC_PERIPHERAL_FREQMHZ" VALUE="100"/>
        <PARAMETER NAME="PCW_SMC_PERIPHERAL_VALID" VALUE="0"/>
        <PARAMETER NAME="PCW_SPI0_BASEADDR" VALUE="0xE0006000"/>
        <PARAMETER NAME="PCW_SPI0_GRP_SS0_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_SPI0_GRP_SS0_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_SPI0_GRP_SS1_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_SPI0_GRP_SS1_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_SPI0_GRP_SS2_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_SPI0_GRP_SS2_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_SPI0_HIGHADDR" VALUE="0xE0006FFF"/>
        <PARAMETER NAME="PCW_SPI0_PERIPHERAL_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_SPI0_SPI0_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_SPI1_BASEADDR" VALUE="0xE0007000"/>
        <PARAMETER NAME="PCW_SPI1_GRP_SS0_ENABLE" VALUE="1"/>
        <PARAMETER NAME="PCW_SPI1_GRP_SS0_IO" VALUE="MIO 13"/>
        <PARAMETER NAME="PCW_SPI1_GRP_SS1_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_SPI1_GRP_SS1_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_SPI1_GRP_SS2_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_SPI1_GRP_SS2_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_SPI1_HIGHADDR" VALUE="0xE0007FFF"/>
        <PARAMETER NAME="PCW_SPI1_PERIPHERAL_ENABLE" VALUE="1"/>
        <PARAMETER NAME="PCW_SPI1_SPI1_IO" VALUE="MIO 10 .. 15"/>
        <PARAMETER NAME="PCW_SPI_PERIPHERAL_CLKSRC" VALUE="IO PLL"/>
        <PARAMETER NAME="PCW_SPI_PERIPHERAL_DIVISOR0" VALUE="6"/>
        <PARAMETER NAME="PCW_SPI_PERIPHERAL_FREQMHZ" VALUE="166.666666"/>
        <PARAMETER NAME="PCW_SPI_PERIPHERAL_VALID" VALUE="1"/>
        <PARAMETER NAME="PCW_S_AXI_ACP_ARUSER_VAL" VALUE="31"/>
        <PARAMETER NAME="PCW_S_AXI_ACP_AWUSER_VAL" VALUE="31"/>
        <PARAMETER NAME="PCW_S_AXI_ACP_FREQMHZ" VALUE="10"/>
        <PARAMETER NAME="PCW_S_AXI_ACP_ID_WIDTH" VALUE="3"/>
        <PARAMETER NAME="PCW_S_AXI_GP0_FREQMHZ" VALUE="10"/>
        <PARAMETER NAME="PCW_S_AXI_GP0_ID_WIDTH" VALUE="6"/>
        <PARAMETER NAME="PCW_S_AXI_GP1_FREQMHZ" VALUE="10"/>
        <PARAMETER NAME="PCW_S_AXI_GP1_ID_WIDTH" VALUE="6"/>
        <PARAMETER NAME="PCW_S_AXI_HP0_DATA_WIDTH" VALUE="64"/>
        <PARAMETER NAME="PCW_S_AXI_HP0_FREQMHZ" VALUE="125"/>
        <PARAMETER NAME="PCW_S_AXI_HP0_ID_WIDTH" VALUE="6"/>
        <PARAMETER NAME="PCW_S_AXI_HP1_DATA_WIDTH" VALUE="64"/>
        <PARAMETER NAME="PCW_S_AXI_HP1_FREQMHZ" VALUE="125"/>
        <PARAMETER NAME="PCW_S_AXI_HP1_ID_WIDTH" VALUE="6"/>
        <PARAMETER NAME="PCW_S_AXI_HP2_DATA_WIDTH" VALUE="64"/>
        <PARAMETER NAME="PCW_S_AXI_HP2_FREQMHZ" VALUE="10"/>
        <PARAMETER NAME="PCW_S_AXI_HP2_ID_WIDTH" VALUE="6"/>
        <PARAMETER NAME="PCW_S_AXI_HP3_DATA_WIDTH" VALUE="64"/>
        <PARAMETER NAME="PCW_S_AXI_HP3_FREQMHZ" VALUE="10"/>
        <PARAMETER NAME="PCW_S_AXI_HP3_ID_WIDTH" VALUE="6"/>
        <PARAMETER NAME="PCW_TPIU_PERIPHERAL_CLKSRC" VALUE="External"/>
        <PARAMETER NAME="PCW_TPIU_PERIPHERAL_DIVISOR0" VALUE="1"/>
        <PARAMETER NAME="PCW_TPIU_PERIPHERAL_FREQMHZ" VALUE="200"/>
        <PARAMETER NAME="PCW_TRACE_BUFFER_CLOCK_DELAY" VALUE="12"/>
        <PARAMETER NAME="PCW_TRACE_BUFFER_FIFO_SIZE" VALUE="128"/>
        <PARAMETER NAME="PCW_TRACE_GRP_16BIT_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_TRACE_GRP_16BIT_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_TRACE_GRP_2BIT_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_TRACE_GRP_2BIT_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_TRACE_GRP_32BIT_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_TRACE_GRP_32BIT_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_TRACE_GRP_4BIT_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_TRACE_GRP_4BIT_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_TRACE_GRP_8BIT_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_TRACE_GRP_8BIT_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_TRACE_INTERNAL_WIDTH" VALUE="2"/>
        <PARAMETER NAME="PCW_TRACE_PERIPHERAL_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_TRACE_PIPELINE_WIDTH" VALUE="8"/>
        <PARAMETER NAME="PCW_TRACE_TRACE_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_TTC0_BASEADDR" VALUE="0xE0104000"/>
        <PARAMETER NAME="PCW_TTC0_CLK0_PERIPHERAL_CLKSRC" VALUE="CPU_1X"/>
        <PARAMETER NAME="PCW_TTC0_CLK0_PERIPHERAL_DIVISOR0" VALUE="1"/>
        <PARAMETER NAME="PCW_TTC0_CLK0_PERIPHERAL_FREQMHZ" VALUE="133.333333"/>
        <PARAMETER NAME="PCW_TTC0_CLK1_PERIPHERAL_CLKSRC" VALUE="CPU_1X"/>
        <PARAMETER NAME="PCW_TTC0_CLK1_PERIPHERAL_DIVISOR0" VALUE="1"/>
        <PARAMETER NAME="PCW_TTC0_CLK1_PERIPHERAL_FREQMHZ" VALUE="133.333333"/>
        <PARAMETER NAME="PCW_TTC0_CLK2_PERIPHERAL_CLKSRC" VALUE="CPU_1X"/>
        <PARAMETER NAME="PCW_TTC0_CLK2_PERIPHERAL_DIVISOR0" VALUE="1"/>
        <PARAMETER NAME="PCW_TTC0_CLK2_PERIPHERAL_FREQMHZ" VALUE="133.333333"/>
        <PARAMETER NAME="PCW_TTC0_HIGHADDR" VALUE="0xE0104fff"/>
        <PARAMETER NAME="PCW_TTC0_PERIPHERAL_ENABLE" VALUE="1"/>
        <PARAMETER NAME="PCW_TTC0_TTC0_IO" VALUE="EMIO"/>
        <PARAMETER NAME="PCW_TTC1_BASEADDR" VALUE="0xE0105000"/>
        <PARAMETER NAME="PCW_TTC1_CLK0_PERIPHERAL_CLKSRC" VALUE="CPU_1X"/>
        <PARAMETER NAME="PCW_TTC1_CLK0_PERIPHERAL_DIVISOR0" VALUE="1"/>
        <PARAMETER NAME="PCW_TTC1_CLK0_PERIPHERAL_FREQMHZ" VALUE="133.333333"/>
        <PARAMETER NAME="PCW_TTC1_CLK1_PERIPHERAL_CLKSRC" VALUE="CPU_1X"/>
        <PARAMETER NAME="PCW_TTC1_CLK1_PERIPHERAL_DIVISOR0" VALUE="1"/>
        <PARAMETER NAME="PCW_TTC1_CLK1_PERIPHERAL_FREQMHZ" VALUE="133.333333"/>
        <PARAMETER NAME="PCW_TTC1_CLK2_PERIPHERAL_CLKSRC" VALUE="CPU_1X"/>
        <PARAMETER NAME="PCW_TTC1_CLK2_PERIPHERAL_DIVISOR0" VALUE="1"/>
        <PARAMETER NAME="PCW_TTC1_CLK2_PERIPHERAL_FREQMHZ" VALUE="133.333333"/>
        <PARAMETER NAME="PCW_TTC1_HIGHADDR" VALUE="0xE0105fff"/>
        <PARAMETER NAME="PCW_TTC1_PERIPHERAL_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_TTC1_TTC1_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_TTC_PERIPHERAL_FREQMHZ" VALUE="50"/>
        <PARAMETER NAME="PCW_UART0_BASEADDR" VALUE="0xE0000000"/>
        <PARAMETER NAME="PCW_UART0_BAUD_RATE" VALUE="115200"/>
        <PARAMETER NAME="PCW_UART0_GRP_FULL_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_UART0_GRP_FULL_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_UART0_HIGHADDR" VALUE="0xE0000FFF"/>
        <PARAMETER NAME="PCW_UART0_PERIPHERAL_ENABLE" VALUE="1"/>
        <PARAMETER NAME="PCW_UART0_UART0_IO" VALUE="MIO 14 .. 15"/>
        <PARAMETER NAME="PCW_UART1_BASEADDR" VALUE="0xE0001000"/>
        <PARAMETER NAME="PCW_UART1_BAUD_RATE" VALUE="115200"/>
        <PARAMETER NAME="PCW_UART1_GRP_FULL_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_UART1_GRP_FULL_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_UART1_HIGHADDR" VALUE="0xE0001FFF"/>
        <PARAMETER NAME="PCW_UART1_PERIPHERAL_ENABLE" VALUE="1"/>
        <PARAMETER NAME="PCW_UART1_UART1_IO" VALUE="MIO 8 .. 9"/>
        <PARAMETER NAME="PCW_UART_PERIPHERAL_CLKSRC" VALUE="IO PLL"/>
        <PARAMETER NAME="PCW_UART_PERIPHERAL_DIVISOR0" VALUE="10"/>
        <PARAMETER NAME="PCW_UART_PERIPHERAL_FREQMHZ" VALUE="100"/>
        <PARAMETER NAME="PCW_UART_PERIPHERAL_VALID" VALUE="1"/>
        <PARAMETER NAME="PCW_UIPARAM_ACT_DDR_FREQ_MHZ" VALUE="533.333374"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_ADV_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_AL" VALUE="0"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_BANK_ADDR_COUNT" VALUE="3"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_BL" VALUE="8"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_BOARD_DELAY0" VALUE="0.25"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_BOARD_DELAY1" VALUE="0.25"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_BOARD_DELAY2" VALUE="0.25"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_BOARD_DELAY3" VALUE="0.25"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_BUS_WIDTH" VALUE="16 Bit"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_CL" VALUE="7"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_CLOCK_0_LENGTH_MM" VALUE="0"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_CLOCK_0_PACKAGE_LENGTH" VALUE="54.563"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_CLOCK_0_PROPOGATION_DELAY" VALUE="160"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_CLOCK_1_LENGTH_MM" VALUE="0"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_CLOCK_1_PACKAGE_LENGTH" VALUE="54.563"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_CLOCK_1_PROPOGATION_DELAY" VALUE="160"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_CLOCK_2_LENGTH_MM" VALUE="0"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_CLOCK_2_PACKAGE_LENGTH" VALUE="54.563"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_CLOCK_2_PROPOGATION_DELAY" VALUE="160"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_CLOCK_3_LENGTH_MM" VALUE="0"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_CLOCK_3_PACKAGE_LENGTH" VALUE="54.563"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_CLOCK_3_PROPOGATION_DELAY" VALUE="160"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_CLOCK_STOP_EN" VALUE="0"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_COL_ADDR_COUNT" VALUE="10"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_CWL" VALUE="6"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DEVICE_CAPACITY" VALUE="4096 MBits"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DQS_0_LENGTH_MM" VALUE="0"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DQS_0_PACKAGE_LENGTH" VALUE="101.239"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DQS_0_PROPOGATION_DELAY" VALUE="160"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DQS_1_LENGTH_MM" VALUE="0"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DQS_1_PACKAGE_LENGTH" VALUE="79.5025"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DQS_1_PROPOGATION_DELAY" VALUE="160"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DQS_2_LENGTH_MM" VALUE="0"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DQS_2_PACKAGE_LENGTH" VALUE="60.536"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DQS_2_PROPOGATION_DELAY" VALUE="160"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DQS_3_LENGTH_MM" VALUE="0"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DQS_3_PACKAGE_LENGTH" VALUE="71.7715"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DQS_3_PROPOGATION_DELAY" VALUE="160"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_0" VALUE="0.0"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_1" VALUE="0.0"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_2" VALUE="0.0"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_3" VALUE="0.0"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DQ_0_LENGTH_MM" VALUE="0"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DQ_0_PACKAGE_LENGTH" VALUE="104.5365"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DQ_0_PROPOGATION_DELAY" VALUE="160"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DQ_1_LENGTH_MM" VALUE="0"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DQ_1_PACKAGE_LENGTH" VALUE="70.676"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DQ_1_PROPOGATION_DELAY" VALUE="160"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DQ_2_LENGTH_MM" VALUE="0"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DQ_2_PACKAGE_LENGTH" VALUE="59.1615"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DQ_2_PROPOGATION_DELAY" VALUE="160"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DQ_3_LENGTH_MM" VALUE="0"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DQ_3_PACKAGE_LENGTH" VALUE="81.319"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DQ_3_PROPOGATION_DELAY" VALUE="160"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_DRAM_WIDTH" VALUE="16 Bits"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_ECC" VALUE="Disabled"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_ENABLE" VALUE="1"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_FREQ_MHZ" VALUE="533.333333"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_HIGH_TEMP" VALUE="Normal (0-85)"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_MEMORY_TYPE" VALUE="DDR 3"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_PARTNO" VALUE="MT41J256M16 RE-125"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_ROW_ADDR_COUNT" VALUE="15"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_SPEED_BIN" VALUE="DDR3_1066F"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_TRAIN_DATA_EYE" VALUE="1"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_TRAIN_READ_GATE" VALUE="1"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_TRAIN_WRITE_LEVEL" VALUE="1"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_T_FAW" VALUE="40.0"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_T_RAS_MIN" VALUE="35.0"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_T_RC" VALUE="48.91"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_T_RCD" VALUE="7"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_T_RP" VALUE="7"/>
        <PARAMETER NAME="PCW_UIPARAM_DDR_USE_INTERNAL_VREF" VALUE="0"/>
        <PARAMETER NAME="PCW_UIPARAM_GENERATE_SUMMARY" VALUE="NA"/>
        <PARAMETER NAME="PCW_USB0_BASEADDR" VALUE="0xE0102000"/>
        <PARAMETER NAME="PCW_USB0_HIGHADDR" VALUE="0xE0102fff"/>
        <PARAMETER NAME="PCW_USB0_PERIPHERAL_ENABLE" VALUE="1"/>
        <PARAMETER NAME="PCW_USB0_PERIPHERAL_FREQMHZ" VALUE="60"/>
        <PARAMETER NAME="PCW_USB0_RESET_ENABLE" VALUE="1"/>
        <PARAMETER NAME="PCW_USB0_RESET_IO" VALUE="MIO 48"/>
        <PARAMETER NAME="PCW_USB0_USB0_IO" VALUE="MIO 28 .. 39"/>
        <PARAMETER NAME="PCW_USB1_BASEADDR" VALUE="0xE0103000"/>
        <PARAMETER NAME="PCW_USB1_HIGHADDR" VALUE="0xE0103fff"/>
        <PARAMETER NAME="PCW_USB1_PERIPHERAL_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_USB1_PERIPHERAL_FREQMHZ" VALUE="60"/>
        <PARAMETER NAME="PCW_USB1_RESET_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_USB1_RESET_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_USB1_USB1_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="PCW_USB_RESET_ENABLE" VALUE="1"/>
        <PARAMETER NAME="PCW_USB_RESET_POLARITY" VALUE="Active Low"/>
        <PARAMETER NAME="PCW_USB_RESET_SELECT" VALUE="Share reset pin"/>
        <PARAMETER NAME="PCW_USE_AXI_FABRIC_IDLE" VALUE="0"/>
        <PARAMETER NAME="PCW_USE_AXI_NONSECURE" VALUE="0"/>
        <PARAMETER NAME="PCW_USE_CORESIGHT" VALUE="0"/>
        <PARAMETER NAME="PCW_USE_CROSS_TRIGGER" VALUE="0"/>
        <PARAMETER NAME="PCW_USE_CR_FABRIC" VALUE="1"/>
        <PARAMETER NAME="PCW_USE_DDR_BYPASS" VALUE="0"/>
        <PARAMETER NAME="PCW_USE_DEBUG" VALUE="0"/>
        <PARAMETER NAME="PCW_USE_DEFAULT_ACP_USER_VAL" VALUE="0"/>
        <PARAMETER NAME="PCW_USE_DMA0" VALUE="0"/>
        <PARAMETER NAME="PCW_USE_DMA1" VALUE="0"/>
        <PARAMETER NAME="PCW_USE_DMA2" VALUE="0"/>
        <PARAMETER NAME="PCW_USE_DMA3" VALUE="0"/>
        <PARAMETER NAME="PCW_USE_EXPANDED_IOP" VALUE="0"/>
        <PARAMETER NAME="PCW_USE_EXPANDED_PS_SLCR_REGISTERS" VALUE="0"/>
        <PARAMETER NAME="PCW_USE_FABRIC_INTERRUPT" VALUE="1"/>
        <PARAMETER NAME="PCW_USE_HIGH_OCM" VALUE="0"/>
        <PARAMETER NAME="PCW_USE_M_AXI_GP0" VALUE="1"/>
        <PARAMETER NAME="PCW_USE_M_AXI_GP1" VALUE="1"/>
        <PARAMETER NAME="PCW_USE_PROC_EVENT_BUS" VALUE="0"/>
        <PARAMETER NAME="PCW_USE_PS_SLCR_REGISTERS" VALUE="0"/>
        <PARAMETER NAME="PCW_USE_S_AXI_ACP" VALUE="0"/>
        <PARAMETER NAME="PCW_USE_S_AXI_GP0" VALUE="0"/>
        <PARAMETER NAME="PCW_USE_S_AXI_GP1" VALUE="0"/>
        <PARAMETER NAME="PCW_USE_S_AXI_HP0" VALUE="1"/>
        <PARAMETER NAME="PCW_USE_S_AXI_HP1" VALUE="1"/>
        <PARAMETER NAME="PCW_USE_S_AXI_HP2" VALUE="0"/>
        <PARAMETER NAME="PCW_USE_S_AXI_HP3" VALUE="0"/>
        <PARAMETER NAME="PCW_USE_TRACE" VALUE="0"/>
        <PARAMETER NAME="PCW_USE_TRACE_DATA_EDGE_DETECTOR" VALUE="0"/>
        <PARAMETER NAME="PCW_VALUE_SILVERSION" VALUE="3"/>
        <PARAMETER NAME="PCW_WDT_PERIPHERAL_CLKSRC" VALUE="CPU_1X"/>
        <PARAMETER NAME="PCW_WDT_PERIPHERAL_DIVISOR0" VALUE="1"/>
        <PARAMETER NAME="PCW_WDT_PERIPHERAL_ENABLE" VALUE="0"/>
        <PARAMETER NAME="PCW_WDT_PERIPHERAL_FREQMHZ" VALUE="133.333333"/>
        <PARAMETER NAME="PCW_WDT_WDT_IO" VALUE="&lt;Select>"/>
        <PARAMETER NAME="preset" VALUE="None"/>
        <PARAMETER NAME="EDK_IPTYPE" VALUE="PERIPHERAL"/>
        <PARAMETER NAME="C_BASEADDR" VALUE="0x00000000"/>
        <PARAMETER NAME="C_HIGHADDR" VALUE="0x1FFFFFFF"/>
      </PARAMETERS>
      <PORTS>
        <PORT DIR="IO" LEFT="14" NAME="DDR_Addr" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_DDR_Addr">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="DDR_addr"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="IO" LEFT="2" NAME="DDR_BankAddr" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_DDR_BankAddr">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="DDR_ba"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="IO" NAME="DDR_CAS_n" SIGIS="undef" SIGNAME="processing_system7_DDR_CAS_n">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="DDR_cas_n"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="IO" NAME="DDR_CKE" SIGIS="undef" SIGNAME="processing_system7_DDR_CKE">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="DDR_cke"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="IO" NAME="DDR_CS_n" SIGIS="undef" SIGNAME="processing_system7_DDR_CS_n">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="DDR_cs_n"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="IO" NAME="DDR_Clk" SIGIS="clk" SIGNAME="processing_system7_DDR_Clk">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="DDR_ck_p"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="IO" NAME="DDR_Clk_n" SIGIS="clk" SIGNAME="processing_system7_DDR_Clk_n">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="DDR_ck_n"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="IO" LEFT="3" NAME="DDR_DM" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_DDR_DM">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="DDR_dm"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="IO" LEFT="31" NAME="DDR_DQ" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_DDR_DQ">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="DDR_dq"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="IO" LEFT="3" NAME="DDR_DQS" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_DDR_DQS">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="DDR_dqs_p"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="IO" LEFT="3" NAME="DDR_DQS_n" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_DDR_DQS_n">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="DDR_dqs_n"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="IO" NAME="DDR_DRSTB" SIGIS="rst" SIGNAME="processing_system7_DDR_DRSTB">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="DDR_reset_n"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="IO" NAME="DDR_ODT" SIGIS="undef" SIGNAME="processing_system7_DDR_ODT">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="DDR_odt"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="IO" NAME="DDR_RAS_n" SIGIS="undef" SIGNAME="processing_system7_DDR_RAS_n">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="DDR_ras_n"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="IO" NAME="DDR_VRN" SIGIS="undef" SIGNAME="processing_system7_DDR_VRN">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="FIXED_IO_ddr_vrn"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="IO" NAME="DDR_VRP" SIGIS="undef" SIGNAME="processing_system7_DDR_VRP">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="FIXED_IO_ddr_vrp"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="IO" NAME="DDR_WEB" SIGIS="undef" SIGNAME="processing_system7_DDR_WEB">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="DDR_we_n"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="ENET0_MDIO_I" SIGIS="undef"/>
        <PORT DIR="O" NAME="ENET0_MDIO_MDC" SIGIS="clk"/>
        <PORT DIR="O" NAME="ENET0_MDIO_O" SIGIS="undef"/>
        <PORT DIR="O" NAME="ENET0_MDIO_T" SIGIS="undef"/>
        <PORT CLKFREQUENCY="125000000" DIR="O" NAME="FCLK_CLK0" SIGIS="clk" SIGNAME="processing_system7_FCLK_CLK0">
          <CONNECTIONS>
            <CONNECTION INSTANCE="External_Ports" PORT="FCLK_CLK0"/>
          </CONNECTIONS>
        </PORT>
        <PORT CLKFREQUENCY="250000000" DIR="O" NAME="FCLK_CLK1" SIGIS="clk" SIGNAME="processing_system7_FCLK_CLK1">
          <CONNECTIONS>
            <CONNECTION INSTANCE="External_Ports" PORT="FCLK_CLK1"/>
          </CONNECTIONS>
        </PORT>
        <PORT CLKFREQUENCY="50000000" DIR="O" NAME="FCLK_CLK2" SIGIS="clk" SIGNAME="processing_system7_FCLK_CLK2">
          <CONNECTIONS>
            <CONNECTION INSTANCE="External_Ports" PORT="FCLK_CLK2"/>
          </CONNECTIONS>
        </PORT>
        <PORT CLKFREQUENCY="200000000" DIR="O" NAME="FCLK_CLK3" SIGIS="clk" SIGNAME="processing_system7_FCLK_CLK3">
          <CONNECTIONS>
            <CONNECTION INSTANCE="External_Ports" PORT="FCLK_CLK3"/>
            <CONNECTION INSTANCE="axi_protocol_converter_0" PORT="aclk"/>
            <CONNECTION INSTANCE="proc_sys_reset" PORT="slowest_sync_clk"/>
            <CONNECTION INSTANCE="processing_system7" PORT="M_AXI_GP1_ACLK"/>
            <CONNECTION INSTANCE="xadc" PORT="s_axi_aclk"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="FCLK_RESET0_N" POLARITY="ACTIVE_LOW" SIGIS="rst" SIGNAME="processing_system7_FCLK_RESET0_N">
          <CONNECTIONS>
            <CONNECTION INSTANCE="External_Ports" PORT="FCLK_RESET0_N"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="FCLK_RESET1_N" POLARITY="ACTIVE_LOW" SIGIS="rst" SIGNAME="processing_system7_FCLK_RESET1_N">
          <CONNECTIONS>
            <CONNECTION INSTANCE="External_Ports" PORT="FCLK_RESET1_N"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="FCLK_RESET2_N" POLARITY="ACTIVE_LOW" SIGIS="rst" SIGNAME="processing_system7_FCLK_RESET2_N">
          <CONNECTIONS>
            <CONNECTION INSTANCE="External_Ports" PORT="FCLK_RESET2_N"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="FCLK_RESET3_N" POLARITY="ACTIVE_LOW" SIGIS="rst" SIGNAME="processing_system7_FCLK_RESET3_N">
          <CONNECTIONS>
            <CONNECTION INSTANCE="External_Ports" PORT="FCLK_RESET3_N"/>
            <CONNECTION INSTANCE="proc_sys_reset" PORT="ext_reset_in"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="0" NAME="IRQ_F2P" RIGHT="0" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="xadc_ip2intc_irpt">
          <CONNECTIONS>
            <CONNECTION INSTANCE="xadc" PORT="ip2intc_irpt"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="IO" LEFT="53" NAME="MIO" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_MIO">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="FIXED_IO_mio"/>
          </CONNECTIONS>
        </PORT>
        <PORT CLKFREQUENCY="125000000" DIR="I" NAME="M_AXI_GP0_ACLK" SIGIS="clk" SIGNAME="External_Ports_M_AXI_GP0_ACLK">
          <CONNECTIONS>
            <CONNECTION INSTANCE="External_Ports" PORT="M_AXI_GP0_ACLK"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="31" NAME="M_AXI_GP0_ARADDR" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_ARADDR">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="M_AXI_GP0_araddr"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="1" NAME="M_AXI_GP0_ARBURST" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_ARBURST">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="M_AXI_GP0_arburst"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="3" NAME="M_AXI_GP0_ARCACHE" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_ARCACHE">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="M_AXI_GP0_arcache"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="11" NAME="M_AXI_GP0_ARID" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_ARID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="M_AXI_GP0_arid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="3" NAME="M_AXI_GP0_ARLEN" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_ARLEN">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="M_AXI_GP0_arlen"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="1" NAME="M_AXI_GP0_ARLOCK" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_ARLOCK">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="M_AXI_GP0_arlock"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="2" NAME="M_AXI_GP0_ARPROT" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_ARPROT">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="M_AXI_GP0_arprot"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="3" NAME="M_AXI_GP0_ARQOS" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_ARQOS">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="M_AXI_GP0_arqos"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="M_AXI_GP0_ARREADY" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_ARREADY">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="M_AXI_GP0_arready"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="2" NAME="M_AXI_GP0_ARSIZE" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_ARSIZE">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="M_AXI_GP0_arsize"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="M_AXI_GP0_ARVALID" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_ARVALID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="M_AXI_GP0_arvalid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="31" NAME="M_AXI_GP0_AWADDR" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_AWADDR">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="M_AXI_GP0_awaddr"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="1" NAME="M_AXI_GP0_AWBURST" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_AWBURST">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="M_AXI_GP0_awburst"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="3" NAME="M_AXI_GP0_AWCACHE" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_AWCACHE">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="M_AXI_GP0_awcache"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="11" NAME="M_AXI_GP0_AWID" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_AWID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="M_AXI_GP0_awid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="3" NAME="M_AXI_GP0_AWLEN" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_AWLEN">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="M_AXI_GP0_awlen"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="1" NAME="M_AXI_GP0_AWLOCK" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_AWLOCK">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="M_AXI_GP0_awlock"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="2" NAME="M_AXI_GP0_AWPROT" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_AWPROT">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="M_AXI_GP0_awprot"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="3" NAME="M_AXI_GP0_AWQOS" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_AWQOS">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="M_AXI_GP0_awqos"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="M_AXI_GP0_AWREADY" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_AWREADY">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="M_AXI_GP0_awready"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="2" NAME="M_AXI_GP0_AWSIZE" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_AWSIZE">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="M_AXI_GP0_awsize"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="M_AXI_GP0_AWVALID" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_AWVALID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="M_AXI_GP0_awvalid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="11" NAME="M_AXI_GP0_BID" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_BID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="M_AXI_GP0_bid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="M_AXI_GP0_BREADY" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_BREADY">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="M_AXI_GP0_bready"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="1" NAME="M_AXI_GP0_BRESP" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_BRESP">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="M_AXI_GP0_bresp"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="M_AXI_GP0_BVALID" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_BVALID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="M_AXI_GP0_bvalid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="31" NAME="M_AXI_GP0_RDATA" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_RDATA">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="M_AXI_GP0_rdata"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="11" NAME="M_AXI_GP0_RID" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_RID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="M_AXI_GP0_rid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="M_AXI_GP0_RLAST" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_RLAST">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="M_AXI_GP0_rlast"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="M_AXI_GP0_RREADY" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_RREADY">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="M_AXI_GP0_rready"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="1" NAME="M_AXI_GP0_RRESP" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_RRESP">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="M_AXI_GP0_rresp"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="M_AXI_GP0_RVALID" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_RVALID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="M_AXI_GP0_rvalid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="31" NAME="M_AXI_GP0_WDATA" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_WDATA">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="M_AXI_GP0_wdata"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="11" NAME="M_AXI_GP0_WID" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_WID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="M_AXI_GP0_wid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="M_AXI_GP0_WLAST" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_WLAST">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="M_AXI_GP0_wlast"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="M_AXI_GP0_WREADY" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_WREADY">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="M_AXI_GP0_wready"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="3" NAME="M_AXI_GP0_WSTRB" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_WSTRB">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="M_AXI_GP0_wstrb"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="M_AXI_GP0_WVALID" SIGIS="undef" SIGNAME="processing_system7_M_AXI_GP0_WVALID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="M_AXI_GP0_wvalid"/>
          </CONNECTIONS>
        </PORT>
        <PORT CLKFREQUENCY="200000000" DIR="I" NAME="M_AXI_GP1_ACLK" SIGIS="clk" SIGNAME="processing_system7_FCLK_CLK3">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7" PORT="FCLK_CLK3"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="31" NAME="M_AXI_GP1_ARADDR" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_araddr">
          <CONNECTIONS>
            <CONNECTION INSTANCE="axi_protocol_converter_0" PORT="s_axi_araddr"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="1" NAME="M_AXI_GP1_ARBURST" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_arburst">
          <CONNECTIONS>
            <CONNECTION INSTANCE="axi_protocol_converter_0" PORT="s_axi_arburst"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="3" NAME="M_AXI_GP1_ARCACHE" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_arcache">
          <CONNECTIONS>
            <CONNECTION INSTANCE="axi_protocol_converter_0" PORT="s_axi_arcache"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="11" NAME="M_AXI_GP1_ARID" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_arid">
          <CONNECTIONS>
            <CONNECTION INSTANCE="axi_protocol_converter_0" PORT="s_axi_arid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="3" NAME="M_AXI_GP1_ARLEN" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_arlen">
          <CONNECTIONS>
            <CONNECTION INSTANCE="axi_protocol_converter_0" PORT="s_axi_arlen"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="1" NAME="M_AXI_GP1_ARLOCK" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_arlock">
          <CONNECTIONS>
            <CONNECTION INSTANCE="axi_protocol_converter_0" PORT="s_axi_arlock"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="2" NAME="M_AXI_GP1_ARPROT" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_arprot">
          <CONNECTIONS>
            <CONNECTION INSTANCE="axi_protocol_converter_0" PORT="s_axi_arprot"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="3" NAME="M_AXI_GP1_ARQOS" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_arqos">
          <CONNECTIONS>
            <CONNECTION INSTANCE="axi_protocol_converter_0" PORT="s_axi_arqos"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="M_AXI_GP1_ARREADY" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_arready">
          <CONNECTIONS>
            <CONNECTION INSTANCE="axi_protocol_converter_0" PORT="s_axi_arready"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="2" NAME="M_AXI_GP1_ARSIZE" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_arsize">
          <CONNECTIONS>
            <CONNECTION INSTANCE="axi_protocol_converter_0" PORT="s_axi_arsize"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="M_AXI_GP1_ARVALID" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_arvalid">
          <CONNECTIONS>
            <CONNECTION INSTANCE="axi_protocol_converter_0" PORT="s_axi_arvalid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="31" NAME="M_AXI_GP1_AWADDR" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_awaddr">
          <CONNECTIONS>
            <CONNECTION INSTANCE="axi_protocol_converter_0" PORT="s_axi_awaddr"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="1" NAME="M_AXI_GP1_AWBURST" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_awburst">
          <CONNECTIONS>
            <CONNECTION INSTANCE="axi_protocol_converter_0" PORT="s_axi_awburst"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="3" NAME="M_AXI_GP1_AWCACHE" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_awcache">
          <CONNECTIONS>
            <CONNECTION INSTANCE="axi_protocol_converter_0" PORT="s_axi_awcache"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="11" NAME="M_AXI_GP1_AWID" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_awid">
          <CONNECTIONS>
            <CONNECTION INSTANCE="axi_protocol_converter_0" PORT="s_axi_awid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="3" NAME="M_AXI_GP1_AWLEN" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_awlen">
          <CONNECTIONS>
            <CONNECTION INSTANCE="axi_protocol_converter_0" PORT="s_axi_awlen"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="1" NAME="M_AXI_GP1_AWLOCK" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_awlock">
          <CONNECTIONS>
            <CONNECTION INSTANCE="axi_protocol_converter_0" PORT="s_axi_awlock"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="2" NAME="M_AXI_GP1_AWPROT" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_awprot">
          <CONNECTIONS>
            <CONNECTION INSTANCE="axi_protocol_converter_0" PORT="s_axi_awprot"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="3" NAME="M_AXI_GP1_AWQOS" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_awqos">
          <CONNECTIONS>
            <CONNECTION INSTANCE="axi_protocol_converter_0" PORT="s_axi_awqos"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="M_AXI_GP1_AWREADY" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_awready">
          <CONNECTIONS>
            <CONNECTION INSTANCE="axi_protocol_converter_0" PORT="s_axi_awready"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="2" NAME="M_AXI_GP1_AWSIZE" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_awsize">
          <CONNECTIONS>
            <CONNECTION INSTANCE="axi_protocol_converter_0" PORT="s_axi_awsize"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="M_AXI_GP1_AWVALID" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_awvalid">
          <CONNECTIONS>
            <CONNECTION INSTANCE="axi_protocol_converter_0" PORT="s_axi_awvalid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="11" NAME="M_AXI_GP1_BID" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_bid">
          <CONNECTIONS>
            <CONNECTION INSTANCE="axi_protocol_converter_0" PORT="s_axi_bid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="M_AXI_GP1_BREADY" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_bready">
          <CONNECTIONS>
            <CONNECTION INSTANCE="axi_protocol_converter_0" PORT="s_axi_bready"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="1" NAME="M_AXI_GP1_BRESP" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_bresp">
          <CONNECTIONS>
            <CONNECTION INSTANCE="axi_protocol_converter_0" PORT="s_axi_bresp"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="M_AXI_GP1_BVALID" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_bvalid">
          <CONNECTIONS>
            <CONNECTION INSTANCE="axi_protocol_converter_0" PORT="s_axi_bvalid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="31" NAME="M_AXI_GP1_RDATA" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_rdata">
          <CONNECTIONS>
            <CONNECTION INSTANCE="axi_protocol_converter_0" PORT="s_axi_rdata"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="11" NAME="M_AXI_GP1_RID" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_rid">
          <CONNECTIONS>
            <CONNECTION INSTANCE="axi_protocol_converter_0" PORT="s_axi_rid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="M_AXI_GP1_RLAST" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_rlast">
          <CONNECTIONS>
            <CONNECTION INSTANCE="axi_protocol_converter_0" PORT="s_axi_rlast"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="M_AXI_GP1_RREADY" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_rready">
          <CONNECTIONS>
            <CONNECTION INSTANCE="axi_protocol_converter_0" PORT="s_axi_rready"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="1" NAME="M_AXI_GP1_RRESP" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_rresp">
          <CONNECTIONS>
            <CONNECTION INSTANCE="axi_protocol_converter_0" PORT="s_axi_rresp"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="M_AXI_GP1_RVALID" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_rvalid">
          <CONNECTIONS>
            <CONNECTION INSTANCE="axi_protocol_converter_0" PORT="s_axi_rvalid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="31" NAME="M_AXI_GP1_WDATA" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_wdata">
          <CONNECTIONS>
            <CONNECTION INSTANCE="axi_protocol_converter_0" PORT="s_axi_wdata"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="11" NAME="M_AXI_GP1_WID" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_wid">
          <CONNECTIONS>
            <CONNECTION INSTANCE="axi_protocol_converter_0" PORT="s_axi_wid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="M_AXI_GP1_WLAST" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_wlast">
          <CONNECTIONS>
            <CONNECTION INSTANCE="axi_protocol_converter_0" PORT="s_axi_wlast"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="M_AXI_GP1_WREADY" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_wready">
          <CONNECTIONS>
            <CONNECTION INSTANCE="axi_protocol_converter_0" PORT="s_axi_wready"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="3" NAME="M_AXI_GP1_WSTRB" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_wstrb">
          <CONNECTIONS>
            <CONNECTION INSTANCE="axi_protocol_converter_0" PORT="s_axi_wstrb"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="M_AXI_GP1_WVALID" SIGIS="undef" SIGNAME="axi_protocol_converter_0_s_axi_wvalid">
          <CONNECTIONS>
            <CONNECTION INSTANCE="axi_protocol_converter_0" PORT="s_axi_wvalid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="IO" NAME="PS_CLK" SIGIS="undef" SIGNAME="processing_system7_PS_CLK">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="FIXED_IO_ps_clk"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="IO" NAME="PS_PORB" SIGIS="undef" SIGNAME="processing_system7_PS_PORB">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="FIXED_IO_ps_porb"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="IO" NAME="PS_SRSTB" SIGIS="undef" SIGNAME="processing_system7_PS_SRSTB">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="FIXED_IO_ps_srstb"/>
          </CONNECTIONS>
        </PORT>
        <PORT CLKFREQUENCY="125000000" DIR="I" NAME="S_AXI_HP0_ACLK" SIGIS="clk" SIGNAME="External_Ports_S_AXI_HP0_aclk">
          <CONNECTIONS>
            <CONNECTION INSTANCE="External_Ports" PORT="S_AXI_HP0_aclk"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="31" NAME="S_AXI_HP0_ARADDR" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_ARADDR">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP0_araddr"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="1" NAME="S_AXI_HP0_ARBURST" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_ARBURST">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP0_arburst"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="3" NAME="S_AXI_HP0_ARCACHE" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_ARCACHE">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP0_arcache"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="5" NAME="S_AXI_HP0_ARID" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_ARID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP0_arid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="3" NAME="S_AXI_HP0_ARLEN" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_ARLEN">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP0_arlen"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="1" NAME="S_AXI_HP0_ARLOCK" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_ARLOCK">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP0_arlock"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="2" NAME="S_AXI_HP0_ARPROT" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_ARPROT">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP0_arprot"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="3" NAME="S_AXI_HP0_ARQOS" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_ARQOS">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP0_arqos"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="S_AXI_HP0_ARREADY" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_ARREADY">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP0_arready"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="2" NAME="S_AXI_HP0_ARSIZE" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_ARSIZE">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP0_arsize"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="S_AXI_HP0_ARVALID" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_ARVALID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP0_arvalid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="31" NAME="S_AXI_HP0_AWADDR" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_AWADDR">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP0_awaddr"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="1" NAME="S_AXI_HP0_AWBURST" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_AWBURST">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP0_awburst"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="3" NAME="S_AXI_HP0_AWCACHE" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_AWCACHE">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP0_awcache"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="5" NAME="S_AXI_HP0_AWID" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_AWID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP0_awid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="3" NAME="S_AXI_HP0_AWLEN" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_AWLEN">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP0_awlen"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="1" NAME="S_AXI_HP0_AWLOCK" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_AWLOCK">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP0_awlock"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="2" NAME="S_AXI_HP0_AWPROT" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_AWPROT">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP0_awprot"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="3" NAME="S_AXI_HP0_AWQOS" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_AWQOS">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP0_awqos"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="S_AXI_HP0_AWREADY" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_AWREADY">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP0_awready"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="2" NAME="S_AXI_HP0_AWSIZE" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_AWSIZE">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP0_awsize"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="S_AXI_HP0_AWVALID" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_AWVALID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP0_awvalid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="5" NAME="S_AXI_HP0_BID" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_BID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP0_bid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="S_AXI_HP0_BREADY" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_BREADY">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP0_bready"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="1" NAME="S_AXI_HP0_BRESP" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_BRESP">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP0_bresp"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="S_AXI_HP0_BVALID" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_BVALID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP0_bvalid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="2" NAME="S_AXI_HP0_RACOUNT" RIGHT="0" SIGIS="undef"/>
        <PORT DIR="O" LEFT="7" NAME="S_AXI_HP0_RCOUNT" RIGHT="0" SIGIS="undef"/>
        <PORT DIR="O" LEFT="63" NAME="S_AXI_HP0_RDATA" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_RDATA">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP0_rdata"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="S_AXI_HP0_RDISSUECAP1_EN" SIGIS="undef"/>
        <PORT DIR="O" LEFT="5" NAME="S_AXI_HP0_RID" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_RID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP0_rid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="S_AXI_HP0_RLAST" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_RLAST">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP0_rlast"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="S_AXI_HP0_RREADY" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_RREADY">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP0_rready"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="1" NAME="S_AXI_HP0_RRESP" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_RRESP">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP0_rresp"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="S_AXI_HP0_RVALID" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_RVALID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP0_rvalid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="5" NAME="S_AXI_HP0_WACOUNT" RIGHT="0" SIGIS="undef"/>
        <PORT DIR="O" LEFT="7" NAME="S_AXI_HP0_WCOUNT" RIGHT="0" SIGIS="undef"/>
        <PORT DIR="I" LEFT="63" NAME="S_AXI_HP0_WDATA" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_WDATA">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP0_wdata"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="5" NAME="S_AXI_HP0_WID" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_WID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP0_wid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="S_AXI_HP0_WLAST" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_WLAST">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP0_wlast"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="S_AXI_HP0_WREADY" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_WREADY">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP0_wready"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="S_AXI_HP0_WRISSUECAP1_EN" SIGIS="undef"/>
        <PORT DIR="I" LEFT="7" NAME="S_AXI_HP0_WSTRB" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_WSTRB">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP0_wstrb"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="S_AXI_HP0_WVALID" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP0_WVALID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP0_wvalid"/>
          </CONNECTIONS>
        </PORT>
        <PORT CLKFREQUENCY="125000000" DIR="I" NAME="S_AXI_HP1_ACLK" SIGIS="clk" SIGNAME="External_Ports_S_AXI_HP1_aclk">
          <CONNECTIONS>
            <CONNECTION INSTANCE="External_Ports" PORT="S_AXI_HP1_aclk"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="31" NAME="S_AXI_HP1_ARADDR" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_ARADDR">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP1_araddr"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="1" NAME="S_AXI_HP1_ARBURST" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_ARBURST">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP1_arburst"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="3" NAME="S_AXI_HP1_ARCACHE" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_ARCACHE">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP1_arcache"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="5" NAME="S_AXI_HP1_ARID" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_ARID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP1_arid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="3" NAME="S_AXI_HP1_ARLEN" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_ARLEN">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP1_arlen"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="1" NAME="S_AXI_HP1_ARLOCK" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_ARLOCK">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP1_arlock"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="2" NAME="S_AXI_HP1_ARPROT" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_ARPROT">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP1_arprot"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="3" NAME="S_AXI_HP1_ARQOS" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_ARQOS">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP1_arqos"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="S_AXI_HP1_ARREADY" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_ARREADY">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP1_arready"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="2" NAME="S_AXI_HP1_ARSIZE" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_ARSIZE">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP1_arsize"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="S_AXI_HP1_ARVALID" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_ARVALID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP1_arvalid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="31" NAME="S_AXI_HP1_AWADDR" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_AWADDR">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP1_awaddr"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="1" NAME="S_AXI_HP1_AWBURST" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_AWBURST">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP1_awburst"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="3" NAME="S_AXI_HP1_AWCACHE" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_AWCACHE">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP1_awcache"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="5" NAME="S_AXI_HP1_AWID" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_AWID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP1_awid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="3" NAME="S_AXI_HP1_AWLEN" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_AWLEN">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP1_awlen"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="1" NAME="S_AXI_HP1_AWLOCK" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_AWLOCK">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP1_awlock"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="2" NAME="S_AXI_HP1_AWPROT" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_AWPROT">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP1_awprot"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="3" NAME="S_AXI_HP1_AWQOS" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_AWQOS">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP1_awqos"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="S_AXI_HP1_AWREADY" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_AWREADY">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP1_awready"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="2" NAME="S_AXI_HP1_AWSIZE" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_AWSIZE">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP1_awsize"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="S_AXI_HP1_AWVALID" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_AWVALID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP1_awvalid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="5" NAME="S_AXI_HP1_BID" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_BID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP1_bid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="S_AXI_HP1_BREADY" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_BREADY">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP1_bready"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="1" NAME="S_AXI_HP1_BRESP" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_BRESP">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP1_bresp"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="S_AXI_HP1_BVALID" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_BVALID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP1_bvalid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="2" NAME="S_AXI_HP1_RACOUNT" RIGHT="0" SIGIS="undef"/>
        <PORT DIR="O" LEFT="7" NAME="S_AXI_HP1_RCOUNT" RIGHT="0" SIGIS="undef"/>
        <PORT DIR="O" LEFT="63" NAME="S_AXI_HP1_RDATA" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_RDATA">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP1_rdata"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="S_AXI_HP1_RDISSUECAP1_EN" SIGIS="undef"/>
        <PORT DIR="O" LEFT="5" NAME="S_AXI_HP1_RID" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_RID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP1_rid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="S_AXI_HP1_RLAST" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_RLAST">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP1_rlast"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="S_AXI_HP1_RREADY" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_RREADY">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP1_rready"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="1" NAME="S_AXI_HP1_RRESP" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_RRESP">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP1_rresp"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="S_AXI_HP1_RVALID" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_RVALID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP1_rvalid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="5" NAME="S_AXI_HP1_WACOUNT" RIGHT="0" SIGIS="undef"/>
        <PORT DIR="O" LEFT="7" NAME="S_AXI_HP1_WCOUNT" RIGHT="0" SIGIS="undef"/>
        <PORT DIR="I" LEFT="63" NAME="S_AXI_HP1_WDATA" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_WDATA">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP1_wdata"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="5" NAME="S_AXI_HP1_WID" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_WID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP1_wid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="S_AXI_HP1_WLAST" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_WLAST">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP1_wlast"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="S_AXI_HP1_WREADY" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_WREADY">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP1_wready"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="S_AXI_HP1_WRISSUECAP1_EN" SIGIS="undef"/>
        <PORT DIR="I" LEFT="7" NAME="S_AXI_HP1_WSTRB" RIGHT="0" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_WSTRB">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP1_wstrb"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="S_AXI_HP1_WVALID" SIGIS="undef" SIGNAME="processing_system7_S_AXI_HP1_WVALID">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="S_AXI_HP1_wvalid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="TTC0_WAVE0_OUT" SIGIS="undef"/>
        <PORT DIR="O" NAME="TTC0_WAVE1_OUT" SIGIS="undef"/>
        <PORT DIR="O" NAME="TTC0_WAVE2_OUT" SIGIS="undef"/>
        <PORT DIR="O" LEFT="1" NAME="USB0_PORT_INDCTL" RIGHT="0" SIGIS="undef"/>
        <PORT DIR="I" NAME="USB0_VBUS_PWRFAULT" SIGIS="undef"/>
        <PORT DIR="O" NAME="USB0_VBUS_PWRSELECT" SIGIS="undef"/>
      </PORTS>
      <BUSINTERFACES>
        <BUSINTERFACE BUSNAME="__NOC__" NAME="MDIO_ETHERNET_0" TYPE="INITIATOR" VLNV="xilinx.com:interface:mdio:1.0">
          <PARAMETER NAME="CAN_DEBUG" VALUE="false"/>
          <PORTMAPS>
            <PORTMAP LOGICAL="MDC" PHYSICAL="ENET0_MDIO_MDC"/>
            <PORTMAP LOGICAL="MDIO_I" PHYSICAL="ENET0_MDIO_I"/>
            <PORTMAP LOGICAL="MDIO_O" PHYSICAL="ENET0_MDIO_O"/>
            <PORTMAP LOGICAL="MDIO_T" PHYSICAL="ENET0_MDIO_T"/>
          </PORTMAPS>
        </BUSINTERFACE>
        <BUSINTERFACE BUSNAME="processing_system7_DDR" DATAWIDTH="8" NAME="DDR" TYPE="INITIATOR" VLNV="xilinx.com:interface:ddrx:1.0">
          <PARAMETER NAME="AXI_ARBITRATION_SCHEME" VALUE="TDM"/>
          <PARAMETER NAME="BURST_LENGTH" VALUE="8"/>
          <PARAMETER NAME="CAN_DEBUG" VALUE="false"/>
          <PARAMETER NAME="CAS_LATENCY" VALUE="11"/>
          <PARAMETER NAME="CAS_WRITE_LATENCY" VALUE="11"/>
          <PARAMETER NAME="CS_ENABLED" VALUE="true"/>
          <PARAMETER NAME="CUSTOM_PARTS"/>
          <PARAMETER NAME="DATA_MASK_ENABLED" VALUE="true"/>
          <PARAMETER NAME="DATA_WIDTH" VALUE="8"/>
          <PARAMETER NAME="MEMORY_PART"/>
          <PARAMETER NAME="MEMORY_TYPE" VALUE="COMPONENTS"/>
          <PARAMETER NAME="MEM_ADDR_MAP" VALUE="ROW_COLUMN_BANK"/>
          <PARAMETER NAME="SLOT" VALUE="Single"/>
          <PARAMETER NAME="TIMEPERIOD_PS" VALUE="1250"/>
          <PORTMAPS>
            <PORTMAP LOGICAL="ADDR" PHYSICAL="DDR_Addr"/>
            <PORTMAP LOGICAL="BA" PHYSICAL="DDR_BankAddr"/>
            <PORTMAP LOGICAL="CAS_N" PHYSICAL="DDR_CAS_n"/>
            <PORTMAP LOGICAL="CKE" PHYSICAL="DDR_CKE"/>
            <PORTMAP LOGICAL="CK_N" PHYSICAL="DDR_Clk_n"/>
            <PORTMAP LOGICAL="CK_P" PHYSICAL="DDR_Clk"/>
            <PORTMAP LOGICAL="CS_N" PHYSICAL="DDR_CS_n"/>
            <PORTMAP LOGICAL="DM" PHYSICAL="DDR_DM"/>
            <PORTMAP LOGICAL="DQ" PHYSICAL="DDR_DQ"/>
            <PORTMAP LOGICAL="DQS_N" PHYSICAL="DDR_DQS_n"/>
            <PORTMAP LOGICAL="DQS_P" PHYSICAL="DDR_DQS"/>
            <PORTMAP LOGICAL="ODT" PHYSICAL="DDR_ODT"/>
            <PORTMAP LOGICAL="RAS_N" PHYSICAL="DDR_RAS_n"/>
            <PORTMAP LOGICAL="RESET_N" PHYSICAL="DDR_DRSTB"/>
            <PORTMAP LOGICAL="WE_N" PHYSICAL="DDR_WEB"/>
          </PORTMAPS>
        </BUSINTERFACE>
        <BUSINTERFACE BUSNAME="processing_system7_FIXED_IO" NAME="FIXED_IO" TYPE="INITIATOR" VLNV="xilinx.com:display_processing_system7:fixedio:1.0">
          <PARAMETER NAME="CAN_DEBUG" VALUE="false"/>
          <PORTMAPS>
            <PORTMAP LOGICAL="DDR_VRN" PHYSICAL="DDR_VRN"/>
            <PORTMAP LOGICAL="DDR_VRP" PHYSICAL="DDR_VRP"/>
            <PORTMAP LOGICAL="MIO" PHYSICAL="MIO"/>
            <PORTMAP LOGICAL="PS_CLK" PHYSICAL="PS_CLK"/>
            <PORTMAP LOGICAL="PS_PORB" PHYSICAL="PS_PORB"/>
            <PORTMAP LOGICAL="PS_SRSTB" PHYSICAL="PS_SRSTB"/>
          </PORTMAPS>
        </BUSINTERFACE>
        <BUSINTERFACE BUSNAME="__NOC__" NAME="USBIND_0" TYPE="INITIATOR" VLNV="xilinx.com:display_processing_system7:usbctrl:1.0">
          <PORTMAPS>
            <PORTMAP LOGICAL="PORT_INDCTL" PHYSICAL="USB0_PORT_INDCTL"/>
            <PORTMAP LOGICAL="VBUS_PWRFAULT" PHYSICAL="USB0_VBUS_PWRFAULT"/>
            <PORTMAP LOGICAL="VBUS_PWRSELECT" PHYSICAL="USB0_VBUS_PWRSELECT"/>
          </PORTMAPS>
        </BUSINTERFACE>
        <BUSINTERFACE BUSNAME="__NOC__" NAME="S_AXI_HP0_FIFO_CTRL" TYPE="TARGET" VLNV="xilinx.com:display_processing_system7:hpstatusctrl:1.0">
          <PORTMAPS>
            <PORTMAP LOGICAL="RACOUNT" PHYSICAL="S_AXI_HP0_RACOUNT"/>
            <PORTMAP LOGICAL="RCOUNT" PHYSICAL="S_AXI_HP0_RCOUNT"/>
            <PORTMAP LOGICAL="RDISSUECAPEN" PHYSICAL="S_AXI_HP0_RDISSUECAP1_EN"/>
            <PORTMAP LOGICAL="WACOUNT" PHYSICAL="S_AXI_HP0_WACOUNT"/>
            <PORTMAP LOGICAL="WCOUNT" PHYSICAL="S_AXI_HP0_WCOUNT"/>
            <PORTMAP LOGICAL="WRISSUECAPEN" PHYSICAL="S_AXI_HP0_WRISSUECAP1_EN"/>
          </PORTMAPS>
        </BUSINTERFACE>
        <BUSINTERFACE BUSNAME="__NOC__" NAME="S_AXI_HP1_FIFO_CTRL" TYPE="TARGET" VLNV="xilinx.com:display_processing_system7:hpstatusctrl:1.0">
          <PORTMAPS>
            <PORTMAP LOGICAL="RACOUNT" PHYSICAL="S_AXI_HP1_RACOUNT"/>
            <PORTMAP LOGICAL="RCOUNT" PHYSICAL="S_AXI_HP1_RCOUNT"/>
            <PORTMAP LOGICAL="RDISSUECAPEN" PHYSICAL="S_AXI_HP1_RDISSUECAP1_EN"/>
            <PORTMAP LOGICAL="WACOUNT" PHYSICAL="S_AXI_HP1_WACOUNT"/>
            <PORTMAP LOGICAL="WCOUNT" PHYSICAL="S_AXI_HP1_WCOUNT"/>
            <PORTMAP LOGICAL="WRISSUECAPEN" PHYSICAL="S_AXI_HP1_WRISSUECAP1_EN"/>
          </PORTMAPS>
        </BUSINTERFACE>
        <BUSINTERFACE BUSNAME="processing_system7_M_AXI_GP0" DATAWIDTH="32" NAME="M_AXI_GP0" TYPE="MASTER" VLNV="xilinx.com:interface:aximm:1.0">
          <PARAMETER NAME="ADDR_WIDTH" VALUE="32"/>
          <PARAMETER NAME="ARUSER_WIDTH" VALUE="0"/>
          <PARAMETER NAME="AWUSER_WIDTH" VALUE="0"/>
          <PARAMETER NAME="BUSER_WIDTH" VALUE="0"/>
          <PARAMETER NAME="CLK_DOMAIN" VALUE="system_M_AXI_GP0_ACLK"/>
          <PARAMETER NAME="DATA_WIDTH" VALUE="32"/>
          <PARAMETER NAME="FREQ_HZ" VALUE="125000000"/>
          <PARAMETER NAME="HAS_BRESP" VALUE="1"/>
          <PARAMETER NAME="HAS_BURST" VALUE="1"/>
          <PARAMETER NAME="HAS_CACHE" VALUE="1"/>
          <PARAMETER NAME="HAS_LOCK" VALUE="1"/>
          <PARAMETER NAME="HAS_PROT" VALUE="1"/>
          <PARAMETER NAME="HAS_QOS" VALUE="1"/>
          <PARAMETER NAME="HAS_REGION" VALUE="0"/>
          <PARAMETER NAME="HAS_RRESP" VALUE="1"/>
          <PARAMETER NAME="HAS_WSTRB" VALUE="1"/>
          <PARAMETER NAME="ID_WIDTH" VALUE="12"/>
          <PARAMETER NAME="INSERT_VIP" VALUE="0"/>
          <PARAMETER NAME="MAX_BURST_LENGTH" VALUE="16"/>
          <PARAMETER NAME="NUM_READ_OUTSTANDING" VALUE="8"/>
          <PARAMETER NAME="NUM_READ_THREADS" VALUE="4"/>
          <PARAMETER NAME="NUM_WRITE_OUTSTANDING" VALUE="8"/>
          <PARAMETER NAME="NUM_WRITE_THREADS" VALUE="4"/>
          <PARAMETER NAME="PHASE" VALUE="0.0"/>
          <PARAMETER NAME="PROTOCOL" VALUE="AXI3"/>
          <PARAMETER NAME="READ_WRITE_MODE" VALUE="READ_WRITE"/>
          <PARAMETER NAME="RUSER_BITS_PER_BYTE" VALUE="0"/>
          <PARAMETER NAME="RUSER_WIDTH" VALUE="0"/>
          <PARAMETER NAME="SUPPORTS_NARROW_BURST" VALUE="0"/>
          <PARAMETER NAME="WUSER_BITS_PER_BYTE" VALUE="0"/>
          <PARAMETER NAME="WUSER_WIDTH" VALUE="0"/>
          <PORTMAPS>
            <PORTMAP LOGICAL="ARADDR" PHYSICAL="M_AXI_GP0_ARADDR"/>
            <PORTMAP LOGICAL="ARBURST" PHYSICAL="M_AXI_GP0_ARBURST"/>
            <PORTMAP LOGICAL="ARCACHE" PHYSICAL="M_AXI_GP0_ARCACHE"/>
            <PORTMAP LOGICAL="ARID" PHYSICAL="M_AXI_GP0_ARID"/>
            <PORTMAP LOGICAL="ARLEN" PHYSICAL="M_AXI_GP0_ARLEN"/>
            <PORTMAP LOGICAL="ARLOCK" PHYSICAL="M_AXI_GP0_ARLOCK"/>
            <PORTMAP LOGICAL="ARPROT" PHYSICAL="M_AXI_GP0_ARPROT"/>
            <PORTMAP LOGICAL="ARQOS" PHYSICAL="M_AXI_GP0_ARQOS"/>
            <PORTMAP LOGICAL="ARREADY" PHYSICAL="M_AXI_GP0_ARREADY"/>
            <PORTMAP LOGICAL="ARSIZE" PHYSICAL="M_AXI_GP0_ARSIZE"/>
            <PORTMAP LOGICAL="ARVALID" PHYSICAL="M_AXI_GP0_ARVALID"/>
            <PORTMAP LOGICAL="AWADDR" PHYSICAL="M_AXI_GP0_AWADDR"/>
            <PORTMAP LOGICAL="AWBURST" PHYSICAL="M_AXI_GP0_AWBURST"/>
            <PORTMAP LOGICAL="AWCACHE" PHYSICAL="M_AXI_GP0_AWCACHE"/>
            <PORTMAP LOGICAL="AWID" PHYSICAL="M_AXI_GP0_AWID"/>
            <PORTMAP LOGICAL="AWLEN" PHYSICAL="M_AXI_GP0_AWLEN"/>
            <PORTMAP LOGICAL="AWLOCK" PHYSICAL="M_AXI_GP0_AWLOCK"/>
            <PORTMAP LOGICAL="AWPROT" PHYSICAL="M_AXI_GP0_AWPROT"/>
            <PORTMAP LOGICAL="AWQOS" PHYSICAL="M_AXI_GP0_AWQOS"/>
            <PORTMAP LOGICAL="AWREADY" PHYSICAL="M_AXI_GP0_AWREADY"/>
            <PORTMAP LOGICAL="AWSIZE" PHYSICAL="M_AXI_GP0_AWSIZE"/>
            <PORTMAP LOGICAL="AWVALID" PHYSICAL="M_AXI_GP0_AWVALID"/>
            <PORTMAP LOGICAL="BID" PHYSICAL="M_AXI_GP0_BID"/>
            <PORTMAP LOGICAL="BREADY" PHYSICAL="M_AXI_GP0_BREADY"/>
            <PORTMAP LOGICAL="BRESP" PHYSICAL="M_AXI_GP0_BRESP"/>
            <PORTMAP LOGICAL="BVALID" PHYSICAL="M_AXI_GP0_BVALID"/>
            <PORTMAP LOGICAL="RDATA" PHYSICAL="M_AXI_GP0_RDATA"/>
            <PORTMAP LOGICAL="RID" PHYSICAL="M_AXI_GP0_RID"/>
            <PORTMAP LOGICAL="RLAST" PHYSICAL="M_AXI_GP0_RLAST"/>
            <PORTMAP LOGICAL="RREADY" PHYSICAL="M_AXI_GP0_RREADY"/>
            <PORTMAP LOGICAL="RRESP" PHYSICAL="M_AXI_GP0_RRESP"/>
            <PORTMAP LOGICAL="RVALID" PHYSICAL="M_AXI_GP0_RVALID"/>
            <PORTMAP LOGICAL="WDATA" PHYSICAL="M_AXI_GP0_WDATA"/>
            <PORTMAP LOGICAL="WID" PHYSICAL="M_AXI_GP0_WID"/>
            <PORTMAP LOGICAL="WLAST" PHYSICAL="M_AXI_GP0_WLAST"/>
            <PORTMAP LOGICAL="WREADY" PHYSICAL="M_AXI_GP0_WREADY"/>
            <PORTMAP LOGICAL="WSTRB" PHYSICAL="M_AXI_GP0_WSTRB"/>
            <PORTMAP LOGICAL="WVALID" PHYSICAL="M_AXI_GP0_WVALID"/>
          </PORTMAPS>
        </BUSINTERFACE>
        <BUSINTERFACE BUSNAME="processing_system7_M_AXI_GP1" DATAWIDTH="32" NAME="M_AXI_GP1" TYPE="MASTER" VLNV="xilinx.com:interface:aximm:1.0">
          <PARAMETER NAME="ADDR_WIDTH" VALUE="32"/>
          <PARAMETER NAME="ARUSER_WIDTH" VALUE="0"/>
          <PARAMETER NAME="AWUSER_WIDTH" VALUE="0"/>
          <PARAMETER NAME="BUSER_WIDTH" VALUE="0"/>
          <PARAMETER NAME="CLK_DOMAIN" VALUE="system_processing_system7_0_FCLK_CLK3"/>
          <PARAMETER NAME="DATA_WIDTH" VALUE="32"/>
          <PARAMETER NAME="FREQ_HZ" VALUE="200000000"/>
          <PARAMETER NAME="HAS_BRESP" VALUE="1"/>
          <PARAMETER NAME="HAS_BURST" VALUE="1"/>
          <PARAMETER NAME="HAS_CACHE" VALUE="1"/>
          <PARAMETER NAME="HAS_LOCK" VALUE="1"/>
          <PARAMETER NAME="HAS_PROT" VALUE="1"/>
          <PARAMETER NAME="HAS_QOS" VALUE="1"/>
          <PARAMETER NAME="HAS_REGION" VALUE="0"/>
          <PARAMETER NAME="HAS_RRESP" VALUE="1"/>
          <PARAMETER NAME="HAS_WSTRB" VALUE="1"/>
          <PARAMETER NAME="ID_WIDTH" VALUE="12"/>
          <PARAMETER NAME="INSERT_VIP" VALUE="0"/>
          <PARAMETER NAME="MAX_BURST_LENGTH" VALUE="16"/>
          <PARAMETER NAME="NUM_READ_OUTSTANDING" VALUE="8"/>
          <PARAMETER NAME="NUM_READ_THREADS" VALUE="4"/>
          <PARAMETER NAME="NUM_WRITE_OUTSTANDING" VALUE="8"/>
          <PARAMETER NAME="NUM_WRITE_THREADS" VALUE="4"/>
          <PARAMETER NAME="PHASE" VALUE="0.0"/>
          <PARAMETER NAME="PROTOCOL" VALUE="AXI3"/>
          <PARAMETER NAME="READ_WRITE_MODE" VALUE="READ_WRITE"/>
          <PARAMETER NAME="RUSER_BITS_PER_BYTE" VALUE="0"/>
          <PARAMETER NAME="RUSER_WIDTH" VALUE="0"/>
          <PARAMETER NAME="SUPPORTS_NARROW_BURST" VALUE="0"/>
          <PARAMETER NAME="WUSER_BITS_PER_BYTE" VALUE="0"/>
          <PARAMETER NAME="WUSER_WIDTH" VALUE="0"/>
          <PORTMAPS>
            <PORTMAP LOGICAL="ARADDR" PHYSICAL="M_AXI_GP1_ARADDR"/>
            <PORTMAP LOGICAL="ARBURST" PHYSICAL="M_AXI_GP1_ARBURST"/>
            <PORTMAP LOGICAL="ARCACHE" PHYSICAL="M_AXI_GP1_ARCACHE"/>
            <PORTMAP LOGICAL="ARID" PHYSICAL="M_AXI_GP1_ARID"/>
            <PORTMAP LOGICAL="ARLEN" PHYSICAL="M_AXI_GP1_ARLEN"/>
            <PORTMAP LOGICAL="ARLOCK" PHYSICAL="M_AXI_GP1_ARLOCK"/>
            <PORTMAP LOGICAL="ARPROT" PHYSICAL="M_AXI_GP1_ARPROT"/>
            <PORTMAP LOGICAL="ARQOS" PHYSICAL="M_AXI_GP1_ARQOS"/>
            <PORTMAP LOGICAL="ARREADY" PHYSICAL="M_AXI_GP1_ARREADY"/>
            <PORTMAP LOGICAL="ARSIZE" PHYSICAL="M_AXI_GP1_ARSIZE"/>
            <PORTMAP LOGICAL="ARVALID" PHYSICAL="M_AXI_GP1_ARVALID"/>
            <PORTMAP LOGICAL="AWADDR" PHYSICAL="M_AXI_GP1_AWADDR"/>
            <PORTMAP LOGICAL="AWBURST" PHYSICAL="M_AXI_GP1_AWBURST"/>
            <PORTMAP LOGICAL="AWCACHE" PHYSICAL="M_AXI_GP1_AWCACHE"/>
            <PORTMAP LOGICAL="AWID" PHYSICAL="M_AXI_GP1_AWID"/>
            <PORTMAP LOGICAL="AWLEN" PHYSICAL="M_AXI_GP1_AWLEN"/>
            <PORTMAP LOGICAL="AWLOCK" PHYSICAL="M_AXI_GP1_AWLOCK"/>
            <PORTMAP LOGICAL="AWPROT" PHYSICAL="M_AXI_GP1_AWPROT"/>
            <PORTMAP LOGICAL="AWQOS" PHYSICAL="M_AXI_GP1_AWQOS"/>
            <PORTMAP LOGICAL="AWREADY" PHYSICAL="M_AXI_GP1_AWREADY"/>
            <PORTMAP LOGICAL="AWSIZE" PHYSICAL="M_AXI_GP1_AWSIZE"/>
            <PORTMAP LOGICAL="AWVALID" PHYSICAL="M_AXI_GP1_AWVALID"/>
            <PORTMAP LOGICAL="BID" PHYSICAL="M_AXI_GP1_BID"/>
            <PORTMAP LOGICAL="BREADY" PHYSICAL="M_AXI_GP1_BREADY"/>
            <PORTMAP LOGICAL="BRESP" PHYSICAL="M_AXI_GP1_BRESP"/>
            <PORTMAP LOGICAL="BVALID" PHYSICAL="M_AXI_GP1_BVALID"/>
            <PORTMAP LOGICAL="RDATA" PHYSICAL="M_AXI_GP1_RDATA"/>
            <PORTMAP LOGICAL="RID" PHYSICAL="M_AXI_GP1_RID"/>
            <PORTMAP LOGICAL="RLAST" PHYSICAL="M_AXI_GP1_RLAST"/>
            <PORTMAP LOGICAL="RREADY" PHYSICAL="M_AXI_GP1_RREADY"/>
            <PORTMAP LOGICAL="RRESP" PHYSICAL="M_AXI_GP1_RRESP"/>
            <PORTMAP LOGICAL="RVALID" PHYSICAL="M_AXI_GP1_RVALID"/>
            <PORTMAP LOGICAL="WDATA" PHYSICAL="M_AXI_GP1_WDATA"/>
            <PORTMAP LOGICAL="WID" PHYSICAL="M_AXI_GP1_WID"/>
            <PORTMAP LOGICAL="WLAST" PHYSICAL="M_AXI_GP1_WLAST"/>
            <PORTMAP LOGICAL="WREADY" PHYSICAL="M_AXI_GP1_WREADY"/>
            <PORTMAP LOGICAL="WSTRB" PHYSICAL="M_AXI_GP1_WSTRB"/>
            <PORTMAP LOGICAL="WVALID" PHYSICAL="M_AXI_GP1_WVALID"/>
          </PORTMAPS>
        </BUSINTERFACE>
        <BUSINTERFACE BUSNAME="External_Interface_S_AXI_HP0" DATAWIDTH="64" NAME="S_AXI_HP0" TYPE="SLAVE" VLNV="xilinx.com:interface:aximm:1.0">
          <PARAMETER NAME="ADDR_WIDTH" VALUE="32"/>
          <PARAMETER NAME="ARUSER_WIDTH" VALUE="0"/>
          <PARAMETER NAME="AWUSER_WIDTH" VALUE="0"/>
          <PARAMETER NAME="BUSER_WIDTH" VALUE="0"/>
          <PARAMETER NAME="CLK_DOMAIN" VALUE="system_S_AXI_HP0_aclk"/>
          <PARAMETER NAME="DATA_WIDTH" VALUE="64"/>
          <PARAMETER NAME="FREQ_HZ" VALUE="125000000"/>
          <PARAMETER NAME="HAS_BRESP" VALUE="1"/>
          <PARAMETER NAME="HAS_BURST" VALUE="1"/>
          <PARAMETER NAME="HAS_CACHE" VALUE="1"/>
          <PARAMETER NAME="HAS_LOCK" VALUE="1"/>
          <PARAMETER NAME="HAS_PROT" VALUE="1"/>
          <PARAMETER NAME="HAS_QOS" VALUE="1"/>
          <PARAMETER NAME="HAS_REGION" VALUE="0"/>
          <PARAMETER NAME="HAS_RRESP" VALUE="1"/>
          <PARAMETER NAME="HAS_WSTRB" VALUE="1"/>
          <PARAMETER NAME="ID_WIDTH" VALUE="6"/>
          <PARAMETER NAME="INSERT_VIP" VALUE="0"/>
          <PARAMETER NAME="MAX_BURST_LENGTH" VALUE="16"/>
          <PARAMETER NAME="NUM_READ_OUTSTANDING" VALUE="8"/>
          <PARAMETER NAME="NUM_READ_THREADS" VALUE="1"/>
          <PARAMETER NAME="NUM_WRITE_OUTSTANDING" VALUE="8"/>
          <PARAMETER NAME="NUM_WRITE_THREADS" VALUE="1"/>
          <PARAMETER NAME="PHASE" VALUE="0.0"/>
          <PARAMETER NAME="PROTOCOL" VALUE="AXI3"/>
          <PARAMETER NAME="READ_WRITE_MODE" VALUE="READ_WRITE"/>
          <PARAMETER NAME="RUSER_BITS_PER_BYTE" VALUE="0"/>
          <PARAMETER NAME="RUSER_WIDTH" VALUE="0"/>
          <PARAMETER NAME="SUPPORTS_NARROW_BURST" VALUE="1"/>
          <PARAMETER NAME="WUSER_BITS_PER_BYTE" VALUE="0"/>
          <PARAMETER NAME="WUSER_WIDTH" VALUE="0"/>
          <PORTMAPS>
            <PORTMAP LOGICAL="ARADDR" PHYSICAL="S_AXI_HP0_ARADDR"/>
            <PORTMAP LOGICAL="ARBURST" PHYSICAL="S_AXI_HP0_ARBURST"/>
            <PORTMAP LOGICAL="ARCACHE" PHYSICAL="S_AXI_HP0_ARCACHE"/>
            <PORTMAP LOGICAL="ARID" PHYSICAL="S_AXI_HP0_ARID"/>
            <PORTMAP LOGICAL="ARLEN" PHYSICAL="S_AXI_HP0_ARLEN"/>
            <PORTMAP LOGICAL="ARLOCK" PHYSICAL="S_AXI_HP0_ARLOCK"/>
            <PORTMAP LOGICAL="ARPROT" PHYSICAL="S_AXI_HP0_ARPROT"/>
            <PORTMAP LOGICAL="ARQOS" PHYSICAL="S_AXI_HP0_ARQOS"/>
            <PORTMAP LOGICAL="ARREADY" PHYSICAL="S_AXI_HP0_ARREADY"/>
            <PORTMAP LOGICAL="ARSIZE" PHYSICAL="S_AXI_HP0_ARSIZE"/>
            <PORTMAP LOGICAL="ARVALID" PHYSICAL="S_AXI_HP0_ARVALID"/>
            <PORTMAP LOGICAL="AWADDR" PHYSICAL="S_AXI_HP0_AWADDR"/>
            <PORTMAP LOGICAL="AWBURST" PHYSICAL="S_AXI_HP0_AWBURST"/>
            <PORTMAP LOGICAL="AWCACHE" PHYSICAL="S_AXI_HP0_AWCACHE"/>
            <PORTMAP LOGICAL="AWID" PHYSICAL="S_AXI_HP0_AWID"/>
            <PORTMAP LOGICAL="AWLEN" PHYSICAL="S_AXI_HP0_AWLEN"/>
            <PORTMAP LOGICAL="AWLOCK" PHYSICAL="S_AXI_HP0_AWLOCK"/>
            <PORTMAP LOGICAL="AWPROT" PHYSICAL="S_AXI_HP0_AWPROT"/>
            <PORTMAP LOGICAL="AWQOS" PHYSICAL="S_AXI_HP0_AWQOS"/>
            <PORTMAP LOGICAL="AWREADY" PHYSICAL="S_AXI_HP0_AWREADY"/>
            <PORTMAP LOGICAL="AWSIZE" PHYSICAL="S_AXI_HP0_AWSIZE"/>
            <PORTMAP LOGICAL="AWVALID" PHYSICAL="S_AXI_HP0_AWVALID"/>
            <PORTMAP LOGICAL="BID" PHYSICAL="S_AXI_HP0_BID"/>
            <PORTMAP LOGICAL="BREADY" PHYSICAL="S_AXI_HP0_BREADY"/>
            <PORTMAP LOGICAL="BRESP" PHYSICAL="S_AXI_HP0_BRESP"/>
            <PORTMAP LOGICAL="BVALID" PHYSICAL="S_AXI_HP0_BVALID"/>
            <PORTMAP LOGICAL="RDATA" PHYSICAL="S_AXI_HP0_RDATA"/>
            <PORTMAP LOGICAL="RID" PHYSICAL="S_AXI_HP0_RID"/>
            <PORTMAP LOGICAL="RLAST" PHYSICAL="S_AXI_HP0_RLAST"/>
            <PORTMAP LOGICAL="RREADY" PHYSICAL="S_AXI_HP0_RREADY"/>
            <PORTMAP LOGICAL="RRESP" PHYSICAL="S_AXI_HP0_RRESP"/>
            <PORTMAP LOGICAL="RVALID" PHYSICAL="S_AXI_HP0_RVALID"/>
            <PORTMAP LOGICAL="WDATA" PHYSICAL="S_AXI_HP0_WDATA"/>
            <PORTMAP LOGICAL="WID" PHYSICAL="S_AXI_HP0_WID"/>
            <PORTMAP LOGICAL="WLAST" PHYSICAL="S_AXI_HP0_WLAST"/>
            <PORTMAP LOGICAL="WREADY" PHYSICAL="S_AXI_HP0_WREADY"/>
            <PORTMAP LOGICAL="WSTRB" PHYSICAL="S_AXI_HP0_WSTRB"/>
            <PORTMAP LOGICAL="WVALID" PHYSICAL="S_AXI_HP0_WVALID"/>
          </PORTMAPS>
        </BUSINTERFACE>
        <BUSINTERFACE BUSNAME="External_Interface_S_AXI_HP1" DATAWIDTH="64" NAME="S_AXI_HP1" TYPE="SLAVE" VLNV="xilinx.com:interface:aximm:1.0">
          <PARAMETER NAME="ADDR_WIDTH" VALUE="32"/>
          <PARAMETER NAME="ARUSER_WIDTH" VALUE="0"/>
          <PARAMETER NAME="AWUSER_WIDTH" VALUE="0"/>
          <PARAMETER NAME="BUSER_WIDTH" VALUE="0"/>
          <PARAMETER NAME="CLK_DOMAIN" VALUE="system_S_AXI_HP1_aclk"/>
          <PARAMETER NAME="DATA_WIDTH" VALUE="64"/>
          <PARAMETER NAME="FREQ_HZ" VALUE="125000000"/>
          <PARAMETER NAME="HAS_BRESP" VALUE="1"/>
          <PARAMETER NAME="HAS_BURST" VALUE="1"/>
          <PARAMETER NAME="HAS_CACHE" VALUE="1"/>
          <PARAMETER NAME="HAS_LOCK" VALUE="1"/>
          <PARAMETER NAME="HAS_PROT" VALUE="1"/>
          <PARAMETER NAME="HAS_QOS" VALUE="1"/>
          <PARAMETER NAME="HAS_REGION" VALUE="0"/>
          <PARAMETER NAME="HAS_RRESP" VALUE="1"/>
          <PARAMETER NAME="HAS_WSTRB" VALUE="1"/>
          <PARAMETER NAME="ID_WIDTH" VALUE="6"/>
          <PARAMETER NAME="INSERT_VIP" VALUE="0"/>
          <PARAMETER NAME="MAX_BURST_LENGTH" VALUE="16"/>
          <PARAMETER NAME="NUM_READ_OUTSTANDING" VALUE="8"/>
          <PARAMETER NAME="NUM_READ_THREADS" VALUE="1"/>
          <PARAMETER NAME="NUM_WRITE_OUTSTANDING" VALUE="8"/>
          <PARAMETER NAME="NUM_WRITE_THREADS" VALUE="1"/>
          <PARAMETER NAME="PHASE" VALUE="0.0"/>
          <PARAMETER NAME="PROTOCOL" VALUE="AXI3"/>
          <PARAMETER NAME="READ_WRITE_MODE" VALUE="READ_WRITE"/>
          <PARAMETER NAME="RUSER_BITS_PER_BYTE" VALUE="0"/>
          <PARAMETER NAME="RUSER_WIDTH" VALUE="0"/>
          <PARAMETER NAME="SUPPORTS_NARROW_BURST" VALUE="1"/>
          <PARAMETER NAME="WUSER_BITS_PER_BYTE" VALUE="0"/>
          <PARAMETER NAME="WUSER_WIDTH" VALUE="0"/>
          <PORTMAPS>
            <PORTMAP LOGICAL="ARADDR" PHYSICAL="S_AXI_HP1_ARADDR"/>
            <PORTMAP LOGICAL="ARBURST" PHYSICAL="S_AXI_HP1_ARBURST"/>
            <PORTMAP LOGICAL="ARCACHE" PHYSICAL="S_AXI_HP1_ARCACHE"/>
            <PORTMAP LOGICAL="ARID" PHYSICAL="S_AXI_HP1_ARID"/>
            <PORTMAP LOGICAL="ARLEN" PHYSICAL="S_AXI_HP1_ARLEN"/>
            <PORTMAP LOGICAL="ARLOCK" PHYSICAL="S_AXI_HP1_ARLOCK"/>
            <PORTMAP LOGICAL="ARPROT" PHYSICAL="S_AXI_HP1_ARPROT"/>
            <PORTMAP LOGICAL="ARQOS" PHYSICAL="S_AXI_HP1_ARQOS"/>
            <PORTMAP LOGICAL="ARREADY" PHYSICAL="S_AXI_HP1_ARREADY"/>
            <PORTMAP LOGICAL="ARSIZE" PHYSICAL="S_AXI_HP1_ARSIZE"/>
            <PORTMAP LOGICAL="ARVALID" PHYSICAL="S_AXI_HP1_ARVALID"/>
            <PORTMAP LOGICAL="AWADDR" PHYSICAL="S_AXI_HP1_AWADDR"/>
            <PORTMAP LOGICAL="AWBURST" PHYSICAL="S_AXI_HP1_AWBURST"/>
            <PORTMAP LOGICAL="AWCACHE" PHYSICAL="S_AXI_HP1_AWCACHE"/>
            <PORTMAP LOGICAL="AWID" PHYSICAL="S_AXI_HP1_AWID"/>
            <PORTMAP LOGICAL="AWLEN" PHYSICAL="S_AXI_HP1_AWLEN"/>
            <PORTMAP LOGICAL="AWLOCK" PHYSICAL="S_AXI_HP1_AWLOCK"/>
            <PORTMAP LOGICAL="AWPROT" PHYSICAL="S_AXI_HP1_AWPROT"/>
            <PORTMAP LOGICAL="AWQOS" PHYSICAL="S_AXI_HP1_AWQOS"/>
            <PORTMAP LOGICAL="AWREADY" PHYSICAL="S_AXI_HP1_AWREADY"/>
            <PORTMAP LOGICAL="AWSIZE" PHYSICAL="S_AXI_HP1_AWSIZE"/>
            <PORTMAP LOGICAL="AWVALID" PHYSICAL="S_AXI_HP1_AWVALID"/>
            <PORTMAP LOGICAL="BID" PHYSICAL="S_AXI_HP1_BID"/>
            <PORTMAP LOGICAL="BREADY" PHYSICAL="S_AXI_HP1_BREADY"/>
            <PORTMAP LOGICAL="BRESP" PHYSICAL="S_AXI_HP1_BRESP"/>
            <PORTMAP LOGICAL="BVALID" PHYSICAL="S_AXI_HP1_BVALID"/>
            <PORTMAP LOGICAL="RDATA" PHYSICAL="S_AXI_HP1_RDATA"/>
            <PORTMAP LOGICAL="RID" PHYSICAL="S_AXI_HP1_RID"/>
            <PORTMAP LOGICAL="RLAST" PHYSICAL="S_AXI_HP1_RLAST"/>
            <PORTMAP LOGICAL="RREADY" PHYSICAL="S_AXI_HP1_RREADY"/>
            <PORTMAP LOGICAL="RRESP" PHYSICAL="S_AXI_HP1_RRESP"/>
            <PORTMAP LOGICAL="RVALID" PHYSICAL="S_AXI_HP1_RVALID"/>
            <PORTMAP LOGICAL="WDATA" PHYSICAL="S_AXI_HP1_WDATA"/>
            <PORTMAP LOGICAL="WID" PHYSICAL="S_AXI_HP1_WID"/>
            <PORTMAP LOGICAL="WLAST" PHYSICAL="S_AXI_HP1_WLAST"/>
            <PORTMAP LOGICAL="WREADY" PHYSICAL="S_AXI_HP1_WREADY"/>
            <PORTMAP LOGICAL="WSTRB" PHYSICAL="S_AXI_HP1_WSTRB"/>
            <PORTMAP LOGICAL="WVALID" PHYSICAL="S_AXI_HP1_WVALID"/>
          </PORTMAPS>
        </BUSINTERFACE>
      </BUSINTERFACES>
      <MEMORYMAP>
        <MEMRANGE ADDRESSBLOCK="Reg" BASENAME="C_BASEADDR" BASEVALUE="0x40000000" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x7FFFFFFF" INSTANCE="M_AXI_GP0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" MASTERBUSINTERFACE="M_AXI_GP0" MEMTYPE="REGISTER" SLAVEBUSINTERFACE="M_AXI_GP0"/>
        <MEMRANGE ADDRESSBLOCK="Reg" BASENAME="C_BASEADDR" BASEVALUE="0x83C00000" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x83C0FFFF" INSTANCE="xadc" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" MASTERBUSINTERFACE="M_AXI_GP1" MEMTYPE="REGISTER" SLAVEBUSINTERFACE="s_axi_lite"/>
      </MEMORYMAP>
      <PERIPHERALS>
        <PERIPHERAL INSTANCE="xadc"/>
      </PERIPHERALS>
    </MODULE>
    <MODULE COREREVISION="11" FULLNAME="/xadc" HWVERSION="3.3" INSTANCE="xadc" IPTYPE="PERIPHERAL" IS_ENABLE="1" MODCLASS="PERIPHERAL" MODTYPE="xadc_wiz" VLNV="xilinx.com:ip:xadc_wiz:3.3">
      <DOCUMENTS>
        <DOCUMENT SOURCE="http://www.xilinx.com/cgi-bin/docs/ipdoc?c=xadc_wiz;v=v3_3;d=pg091-xadc-wiz.pdf"/>
      </DOCUMENTS>
      <PARAMETERS>
        <PARAMETER NAME="C_ALARM_LIMIT_R0" VALUE="46573"/>
        <PARAMETER NAME="C_ALARM_LIMIT_R1" VALUE="22500"/>
        <PARAMETER NAME="C_ALARM_LIMIT_R2" VALUE="41287"/>
        <PARAMETER NAME="C_ALARM_LIMIT_R3" VALUE="51763"/>
        <PARAMETER NAME="C_ALARM_LIMIT_R4" VALUE="43322"/>
        <PARAMETER NAME="C_ALARM_LIMIT_R5" VALUE="21190"/>
        <PARAMETER NAME="C_ALARM_LIMIT_R6" VALUE="38229"/>
        <PARAMETER NAME="C_ALARM_LIMIT_R7" VALUE="44622"/>
        <PARAMETER NAME="C_ALARM_LIMIT_R8" VALUE="22937"/>
        <PARAMETER NAME="C_ALARM_LIMIT_R9" VALUE="20753"/>
        <PARAMETER NAME="C_ALARM_LIMIT_R10" VALUE="21845"/>
        <PARAMETER NAME="C_ALARM_LIMIT_R11" VALUE="20753"/>
        <PARAMETER NAME="C_ALARM_LIMIT_R12" VALUE="39321"/>
        <PARAMETER NAME="C_ALARM_LIMIT_R13" VALUE="37355"/>
        <PARAMETER NAME="C_ALARM_LIMIT_R14" VALUE="27306"/>
        <PARAMETER NAME="C_ALARM_LIMIT_R15" VALUE="26214"/>
        <PARAMETER NAME="C_CONFIGURATION_R0" VALUE="0"/>
        <PARAMETER NAME="C_CONFIGURATION_R1" VALUE="33024"/>
        <PARAMETER NAME="C_CONFIGURATION_R2" VALUE="1024"/>
        <PARAMETER NAME="C_DCLK_FREQUENCY" VALUE="100"/>
        <PARAMETER NAME="C_EXTERNAL_MUXADDR_ENABLE" VALUE="0"/>
        <PARAMETER NAME="C_EXTERNAL_MUX_CHANNEL" VALUE="VP_VN"/>
        <PARAMETER NAME="C_FIFO_DEPTH" VALUE="7"/>
        <PARAMETER NAME="C_HAS_AXI" VALUE="1"/>
        <PARAMETER NAME="C_HAS_AXI4STREAM" VALUE="0"/>
        <PARAMETER NAME="C_HAS_BUSY" VALUE="1"/>
        <PARAMETER NAME="C_HAS_CHANNEL" VALUE="1"/>
        <PARAMETER NAME="C_HAS_CONVST" VALUE="0"/>
        <PARAMETER NAME="C_HAS_CONVSTCLK" VALUE="0"/>
        <PARAMETER NAME="C_HAS_DCLK" VALUE="1"/>
        <PARAMETER NAME="C_HAS_DRP" VALUE="0"/>
        <PARAMETER NAME="C_HAS_EOC" VALUE="1"/>
        <PARAMETER NAME="C_HAS_EOS" VALUE="1"/>
        <PARAMETER NAME="C_HAS_EXTERNAL_MUX" VALUE="0"/>
        <PARAMETER NAME="C_HAS_JTAGBUSY" VALUE="0"/>
        <PARAMETER NAME="C_HAS_JTAGLOCKED" VALUE="0"/>
        <PARAMETER NAME="C_HAS_JTAGMODIFIED" VALUE="0"/>
        <PARAMETER NAME="C_HAS_OT_ALARM" VALUE="1"/>
        <PARAMETER NAME="C_HAS_RESET" VALUE="0"/>
        <PARAMETER NAME="C_HAS_TEMP_BUS" VALUE="0"/>
        <PARAMETER NAME="C_HAS_USER_TEMP_ALARM" VALUE="1"/>
        <PARAMETER NAME="C_HAS_VBRAM_ALARM" VALUE="0"/>
        <PARAMETER NAME="C_HAS_VCCAUX_ALARM" VALUE="1"/>
        <PARAMETER NAME="C_HAS_VCCDDRO_ALARM" VALUE="1"/>
        <PARAMETER NAME="C_HAS_VCCINT_ALARM" VALUE="1"/>
        <PARAMETER NAME="C_HAS_VCCPAUX_ALARM" VALUE="1"/>
        <PARAMETER NAME="C_HAS_VCCPINT_ALARM" VALUE="1"/>
        <PARAMETER NAME="C_HAS_VN" VALUE="1"/>
        <PARAMETER NAME="C_HAS_VP" VALUE="1"/>
        <PARAMETER NAME="C_INCLUDE_INTR" VALUE="1"/>
        <PARAMETER NAME="C_SAMPLING_RATE" VALUE="961538.4615384615"/>
        <PARAMETER NAME="C_SEQUENCE_R0" VALUE="2048"/>
        <PARAMETER NAME="C_SEQUENCE_R1" VALUE="771"/>
        <PARAMETER NAME="C_SEQUENCE_R2" VALUE="0"/>
        <PARAMETER NAME="C_SEQUENCE_R3" VALUE="0"/>
        <PARAMETER NAME="C_SEQUENCE_R4" VALUE="0"/>
        <PARAMETER NAME="C_SEQUENCE_R5" VALUE="0"/>
        <PARAMETER NAME="C_SEQUENCE_R6" VALUE="0"/>
        <PARAMETER NAME="C_SEQUENCE_R7" VALUE="0"/>
        <PARAMETER NAME="C_SIM_FILE_NAME" VALUE="design"/>
        <PARAMETER NAME="C_SIM_FILE_REL_PATH" VALUE="./"/>
        <PARAMETER NAME="C_SIM_FILE_SEL" VALUE="Default"/>
        <PARAMETER NAME="C_VAUX0" VALUE="1"/>
        <PARAMETER NAME="C_VAUX1" VALUE="1"/>
        <PARAMETER NAME="C_VAUX2" VALUE="0"/>
        <PARAMETER NAME="C_VAUX3" VALUE="0"/>
        <PARAMETER NAME="C_VAUX4" VALUE="0"/>
        <PARAMETER NAME="C_VAUX5" VALUE="0"/>
        <PARAMETER NAME="C_VAUX6" VALUE="0"/>
        <PARAMETER NAME="C_VAUX7" VALUE="0"/>
        <PARAMETER NAME="C_VAUX8" VALUE="1"/>
        <PARAMETER NAME="C_VAUX9" VALUE="1"/>
        <PARAMETER NAME="C_VAUX10" VALUE="0"/>
        <PARAMETER NAME="C_VAUX11" VALUE="0"/>
        <PARAMETER NAME="C_VAUX12" VALUE="0"/>
        <PARAMETER NAME="C_VAUX13" VALUE="0"/>
        <PARAMETER NAME="C_VAUX14" VALUE="0"/>
        <PARAMETER NAME="C_VAUX15" VALUE="0"/>
        <PARAMETER NAME="c_component_name" VALUE="system_xadc_0"/>
        <PARAMETER NAME="ACQUISITION_TIME" VALUE="4"/>
        <PARAMETER NAME="ACQUISITION_TIME_VAUXP0_VAUXN0" VALUE="false"/>
        <PARAMETER NAME="ACQUISITION_TIME_VAUXP10_VAUXN10" VALUE="false"/>
        <PARAMETER NAME="ACQUISITION_TIME_VAUXP11_VAUXN11" VALUE="false"/>
        <PARAMETER NAME="ACQUISITION_TIME_VAUXP12_VAUXN12" VALUE="false"/>
        <PARAMETER NAME="ACQUISITION_TIME_VAUXP13_VAUXN13" VALUE="false"/>
        <PARAMETER NAME="ACQUISITION_TIME_VAUXP14_VAUXN14" VALUE="false"/>
        <PARAMETER NAME="ACQUISITION_TIME_VAUXP15_VAUXN15" VALUE="false"/>
        <PARAMETER NAME="ACQUISITION_TIME_VAUXP1_VAUXN1" VALUE="false"/>
        <PARAMETER NAME="ACQUISITION_TIME_VAUXP2_VAUXN2" VALUE="false"/>
        <PARAMETER NAME="ACQUISITION_TIME_VAUXP3_VAUXN3" VALUE="false"/>
        <PARAMETER NAME="ACQUISITION_TIME_VAUXP4_VAUXN4" VALUE="false"/>
        <PARAMETER NAME="ACQUISITION_TIME_VAUXP5_VAUXN5" VALUE="false"/>
        <PARAMETER NAME="ACQUISITION_TIME_VAUXP6_VAUXN6" VALUE="false"/>
        <PARAMETER NAME="ACQUISITION_TIME_VAUXP7_VAUXN7" VALUE="false"/>
        <PARAMETER NAME="ACQUISITION_TIME_VAUXP8_VAUXN8" VALUE="false"/>
        <PARAMETER NAME="ACQUISITION_TIME_VAUXP9_VAUXN9" VALUE="false"/>
        <PARAMETER NAME="ACQUISITION_TIME_VP_VN" VALUE="false"/>
        <PARAMETER NAME="ADC_CONVERSION_RATE" VALUE="1000"/>
        <PARAMETER NAME="ADC_OFFSET_AND_GAIN_CALIBRATION" VALUE="true"/>
        <PARAMETER NAME="ADC_OFFSET_CALIBRATION" VALUE="false"/>
        <PARAMETER NAME="ADDR_WIDTH" VALUE="32"/>
        <PARAMETER NAME="AVERAGE_ENABLE_TEMPERATURE" VALUE="false"/>
        <PARAMETER NAME="AVERAGE_ENABLE_VAUXP0_VAUXN0" VALUE="false"/>
        <PARAMETER NAME="AVERAGE_ENABLE_VAUXP10_VAUXN10" VALUE="false"/>
        <PARAMETER NAME="AVERAGE_ENABLE_VAUXP11_VAUXN11" VALUE="false"/>
        <PARAMETER NAME="AVERAGE_ENABLE_VAUXP12_VAUXN12" VALUE="false"/>
        <PARAMETER NAME="AVERAGE_ENABLE_VAUXP13_VAUXN13" VALUE="false"/>
        <PARAMETER NAME="AVERAGE_ENABLE_VAUXP14_VAUXN14" VALUE="false"/>
        <PARAMETER NAME="AVERAGE_ENABLE_VAUXP15_VAUXN15" VALUE="false"/>
        <PARAMETER NAME="AVERAGE_ENABLE_VAUXP1_VAUXN1" VALUE="false"/>
        <PARAMETER NAME="AVERAGE_ENABLE_VAUXP2_VAUXN2" VALUE="false"/>
        <PARAMETER NAME="AVERAGE_ENABLE_VAUXP3_VAUXN3" VALUE="false"/>
        <PARAMETER NAME="AVERAGE_ENABLE_VAUXP4_VAUXN4" VALUE="false"/>
        <PARAMETER NAME="AVERAGE_ENABLE_VAUXP5_VAUXN5" VALUE="false"/>
        <PARAMETER NAME="AVERAGE_ENABLE_VAUXP6_VAUXN6" VALUE="false"/>
        <PARAMETER NAME="AVERAGE_ENABLE_VAUXP7_VAUXN7" VALUE="false"/>
        <PARAMETER NAME="AVERAGE_ENABLE_VAUXP8_VAUXN8" VALUE="false"/>
        <PARAMETER NAME="AVERAGE_ENABLE_VAUXP9_VAUXN9" VALUE="false"/>
        <PARAMETER NAME="AVERAGE_ENABLE_VBRAM" VALUE="false"/>
        <PARAMETER NAME="AVERAGE_ENABLE_VCCAUX" VALUE="false"/>
        <PARAMETER NAME="AVERAGE_ENABLE_VCCDDRO" VALUE="false"/>
        <PARAMETER NAME="AVERAGE_ENABLE_VCCINT" VALUE="false"/>
        <PARAMETER NAME="AVERAGE_ENABLE_VCCPAUX" VALUE="false"/>
        <PARAMETER NAME="AVERAGE_ENABLE_VCCPINT" VALUE="false"/>
        <PARAMETER NAME="AVERAGE_ENABLE_VP_VN" VALUE="false"/>
        <PARAMETER NAME="BIPOLAR_OPERATION" VALUE="false"/>
        <PARAMETER NAME="BIPOLAR_VAUXP0_VAUXN0" VALUE="false"/>
        <PARAMETER NAME="BIPOLAR_VAUXP10_VAUXN10" VALUE="false"/>
        <PARAMETER NAME="BIPOLAR_VAUXP11_VAUXN11" VALUE="false"/>
        <PARAMETER NAME="BIPOLAR_VAUXP12_VAUXN12" VALUE="false"/>
        <PARAMETER NAME="BIPOLAR_VAUXP13_VAUXN13" VALUE="false"/>
        <PARAMETER NAME="BIPOLAR_VAUXP14_VAUXN14" VALUE="false"/>
        <PARAMETER NAME="BIPOLAR_VAUXP15_VAUXN15" VALUE="false"/>
        <PARAMETER NAME="BIPOLAR_VAUXP1_VAUXN1" VALUE="false"/>
        <PARAMETER NAME="BIPOLAR_VAUXP2_VAUXN2" VALUE="false"/>
        <PARAMETER NAME="BIPOLAR_VAUXP3_VAUXN3" VALUE="false"/>
        <PARAMETER NAME="BIPOLAR_VAUXP4_VAUXN4" VALUE="false"/>
        <PARAMETER NAME="BIPOLAR_VAUXP5_VAUXN5" VALUE="false"/>
        <PARAMETER NAME="BIPOLAR_VAUXP6_VAUXN6" VALUE="false"/>
        <PARAMETER NAME="BIPOLAR_VAUXP7_VAUXN7" VALUE="false"/>
        <PARAMETER NAME="BIPOLAR_VAUXP8_VAUXN8" VALUE="false"/>
        <PARAMETER NAME="BIPOLAR_VAUXP9_VAUXN9" VALUE="false"/>
        <PARAMETER NAME="BIPOLAR_VP_VN" VALUE="false"/>
        <PARAMETER NAME="CHANNEL_AVERAGING" VALUE="None"/>
        <PARAMETER NAME="CHANNEL_ENABLE_CALIBRATION" VALUE="false"/>
        <PARAMETER NAME="CHANNEL_ENABLE_TEMPERATURE" VALUE="false"/>
        <PARAMETER NAME="CHANNEL_ENABLE_VAUXP0_VAUXN0" VALUE="true"/>
        <PARAMETER NAME="CHANNEL_ENABLE_VAUXP10_VAUXN10" VALUE="false"/>
        <PARAMETER NAME="CHANNEL_ENABLE_VAUXP11_VAUXN11" VALUE="false"/>
        <PARAMETER NAME="CHANNEL_ENABLE_VAUXP12_VAUXN12" VALUE="false"/>
        <PARAMETER NAME="CHANNEL_ENABLE_VAUXP13_VAUXN13" VALUE="false"/>
        <PARAMETER NAME="CHANNEL_ENABLE_VAUXP14_VAUXN14" VALUE="false"/>
        <PARAMETER NAME="CHANNEL_ENABLE_VAUXP15_VAUXN15" VALUE="false"/>
        <PARAMETER NAME="CHANNEL_ENABLE_VAUXP1_VAUXN1" VALUE="true"/>
        <PARAMETER NAME="CHANNEL_ENABLE_VAUXP2_VAUXN2" VALUE="false"/>
        <PARAMETER NAME="CHANNEL_ENABLE_VAUXP3_VAUXN3" VALUE="false"/>
        <PARAMETER NAME="CHANNEL_ENABLE_VAUXP4_VAUXN4" VALUE="false"/>
        <PARAMETER NAME="CHANNEL_ENABLE_VAUXP5_VAUXN5" VALUE="false"/>
        <PARAMETER NAME="CHANNEL_ENABLE_VAUXP6_VAUXN6" VALUE="false"/>
        <PARAMETER NAME="CHANNEL_ENABLE_VAUXP7_VAUXN7" VALUE="false"/>
        <PARAMETER NAME="CHANNEL_ENABLE_VAUXP8_VAUXN8" VALUE="true"/>
        <PARAMETER NAME="CHANNEL_ENABLE_VAUXP9_VAUXN9" VALUE="true"/>
        <PARAMETER NAME="CHANNEL_ENABLE_VBRAM" VALUE="false"/>
        <PARAMETER NAME="CHANNEL_ENABLE_VCCAUX" VALUE="false"/>
        <PARAMETER NAME="CHANNEL_ENABLE_VCCDDRO" VALUE="false"/>
        <PARAMETER NAME="CHANNEL_ENABLE_VCCINT" VALUE="false"/>
        <PARAMETER NAME="CHANNEL_ENABLE_VCCPAUX" VALUE="false"/>
        <PARAMETER NAME="CHANNEL_ENABLE_VCCPINT" VALUE="false"/>
        <PARAMETER NAME="CHANNEL_ENABLE_VP_VN" VALUE="true"/>
        <PARAMETER NAME="CHANNEL_ENABLE_VREFN" VALUE="false"/>
        <PARAMETER NAME="CHANNEL_ENABLE_VREFP" VALUE="false"/>
        <PARAMETER NAME="Component_Name" VALUE="system_xadc_0"/>
        <PARAMETER NAME="DATA_WIDTH" VALUE="32"/>
        <PARAMETER NAME="DCLK_FREQUENCY" VALUE="100"/>
        <PARAMETER NAME="ENABLE_AXI4STREAM" VALUE="false"/>
        <PARAMETER NAME="ENABLE_BUSY" VALUE="true"/>
        <PARAMETER NAME="ENABLE_CALIBRATION_AVERAGING" VALUE="true"/>
        <PARAMETER NAME="ENABLE_CHANNEL" VALUE="true"/>
        <PARAMETER NAME="ENABLE_CONVST" VALUE="true"/>
        <PARAMETER NAME="ENABLE_CONVSTCLK" VALUE="false"/>
        <PARAMETER NAME="ENABLE_DCLK" VALUE="true"/>
        <PARAMETER NAME="ENABLE_DRP" VALUE="true"/>
        <PARAMETER NAME="ENABLE_EOC" VALUE="true"/>
        <PARAMETER NAME="ENABLE_EOS" VALUE="true"/>
        <PARAMETER NAME="ENABLE_EXTERNAL_MUX" VALUE="false"/>
        <PARAMETER NAME="ENABLE_JTAGBUSY" VALUE="true"/>
        <PARAMETER NAME="ENABLE_JTAGLOCKED" VALUE="true"/>
        <PARAMETER NAME="ENABLE_JTAGMODIFIED" VALUE="true"/>
        <PARAMETER NAME="ENABLE_JTAG_ARBITER" VALUE="false"/>
        <PARAMETER NAME="ENABLE_RESET" VALUE="false"/>
        <PARAMETER NAME="ENABLE_TEMP_BUS" VALUE="false"/>
        <PARAMETER NAME="ENABLE_VBRAM_ALARM" VALUE="false"/>
        <PARAMETER NAME="ENABLE_VCCDDRO_ALARM" VALUE="true"/>
        <PARAMETER NAME="ENABLE_VCCPAUX_ALARM" VALUE="true"/>
        <PARAMETER NAME="ENABLE_VCCPINT_ALARM" VALUE="true"/>
        <PARAMETER NAME="EXTERNAL_MUXADDR_ENABLE" VALUE="false"/>
        <PARAMETER NAME="EXTERNAL_MUX_CHANNEL" VALUE="VP_VN"/>
        <PARAMETER NAME="FIFO_DEPTH" VALUE="7"/>
        <PARAMETER NAME="INCREASE_ACQUISITION_TIME" VALUE="false"/>
        <PARAMETER NAME="INTERFACE_SELECTION" VALUE="Enable_AXI"/>
        <PARAMETER NAME="NUM_WAVE" VALUE="1"/>
        <PARAMETER NAME="OT_ALARM" VALUE="true"/>
        <PARAMETER NAME="POWER_DOWN_ADCA" VALUE="false"/>
        <PARAMETER NAME="POWER_DOWN_ADCB" VALUE="false"/>
        <PARAMETER NAME="SENSOR_OFFSET_AND_GAIN_CALIBRATION" VALUE="true"/>
        <PARAMETER NAME="SENSOR_OFFSET_CALIBRATION" VALUE="false"/>
        <PARAMETER NAME="SEQUENCER_MODE" VALUE="Off"/>
        <PARAMETER NAME="SIM_FILE_NAME" VALUE="design"/>
        <PARAMETER NAME="SIM_FILE_REL_PATH" VALUE="./"/>
        <PARAMETER NAME="SIM_FILE_SEL" VALUE="Default"/>
        <PARAMETER NAME="SINGLE_CHANNEL_ACQUISITION_TIME" VALUE="false"/>
        <PARAMETER NAME="SINGLE_CHANNEL_ENABLE_CALIBRATION" VALUE="true"/>
        <PARAMETER NAME="SINGLE_CHANNEL_SELECTION" VALUE="TEMPERATURE"/>
        <PARAMETER NAME="STARTUP_CHANNEL_SELECTION" VALUE="single_channel"/>
        <PARAMETER NAME="STIMULUS_FREQ" VALUE="1.0"/>
        <PARAMETER NAME="TEMPERATURE_ALARM_OT_RESET" VALUE="70.0"/>
        <PARAMETER NAME="TEMPERATURE_ALARM_OT_TRIGGER" VALUE="125.0"/>
        <PARAMETER NAME="TEMPERATURE_ALARM_RESET" VALUE="60.0"/>
        <PARAMETER NAME="TEMPERATURE_ALARM_TRIGGER" VALUE="85.0"/>
        <PARAMETER NAME="TIMING_MODE" VALUE="Continuous"/>
        <PARAMETER NAME="USER_TEMP_ALARM" VALUE="true"/>
        <PARAMETER NAME="VBRAM_ALARM_LOWER" VALUE="0.95"/>
        <PARAMETER NAME="VBRAM_ALARM_UPPER" VALUE="1.05"/>
        <PARAMETER NAME="VCCAUX_ALARM" VALUE="true"/>
        <PARAMETER NAME="VCCAUX_ALARM_LOWER" VALUE="1.75"/>
        <PARAMETER NAME="VCCAUX_ALARM_UPPER" VALUE="1.89"/>
        <PARAMETER NAME="VCCDDRO_ALARM_LOWER" VALUE="1.2"/>
        <PARAMETER NAME="VCCDDRO_ALARM_UPPER" VALUE="1.25"/>
        <PARAMETER NAME="VCCDDRO_VOLT" VALUE="1_2"/>
        <PARAMETER NAME="VCCINT_ALARM" VALUE="true"/>
        <PARAMETER NAME="VCCINT_ALARM_LOWER" VALUE="0.97"/>
        <PARAMETER NAME="VCCINT_ALARM_UPPER" VALUE="1.03"/>
        <PARAMETER NAME="VCCPAUX_ALARM_LOWER" VALUE="1.71"/>
        <PARAMETER NAME="VCCPAUX_ALARM_UPPER" VALUE="1.8"/>
        <PARAMETER NAME="VCCPINT_ALARM_LOWER" VALUE="0.95"/>
        <PARAMETER NAME="VCCPINT_ALARM_UPPER" VALUE="1.00"/>
        <PARAMETER NAME="WAVEFORM_TYPE" VALUE="CONSTANT"/>
        <PARAMETER NAME="XADC_STARUP_SELECTION" VALUE="independent_adc"/>
        <PARAMETER NAME="EDK_IPTYPE" VALUE="PERIPHERAL"/>
        <PARAMETER NAME="C_BASEADDR" VALUE="0x83C00000"/>
        <PARAMETER NAME="C_HIGHADDR" VALUE="0x83C0FFFF"/>
      </PARAMETERS>
      <PORTS>
        <PORT DIR="O" NAME="alarm_out" SIGIS="undef"/>
        <PORT DIR="O" NAME="busy_out" SIGIS="undef"/>
        <PORT DIR="O" LEFT="4" NAME="channel_out" RIGHT="0" SIGIS="undef"/>
        <PORT DIR="O" NAME="eoc_out" SIGIS="undef"/>
        <PORT DIR="O" NAME="eos_out" SIGIS="undef"/>
        <PORT DIR="O" NAME="ip2intc_irpt" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="xadc_ip2intc_irpt">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7" PORT="IRQ_F2P"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="ot_out" SIGIS="undef"/>
        <PORT CLKFREQUENCY="200000000" DIR="I" NAME="s_axi_aclk" SIGIS="clk" SIGNAME="processing_system7_FCLK_CLK3">
          <CONNECTIONS>
            <CONNECTION INSTANCE="processing_system7" PORT="FCLK_CLK3"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="10" NAME="s_axi_araddr" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_m_axi_araddr">
          <CONNECTIONS>
            <CONNECTION INSTANCE="axi_protocol_converter_0" PORT="m_axi_araddr"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="s_axi_aresetn" POLARITY="ACTIVE_LOW" SIGIS="rst" SIGNAME="proc_sys_reset_peripheral_aresetn">
          <CONNECTIONS>
            <CONNECTION INSTANCE="proc_sys_reset" PORT="peripheral_aresetn"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="s_axi_arready" SIGIS="undef" SIGNAME="axi_protocol_converter_0_m_axi_arready">
          <CONNECTIONS>
            <CONNECTION INSTANCE="axi_protocol_converter_0" PORT="m_axi_arready"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="s_axi_arvalid" SIGIS="undef" SIGNAME="axi_protocol_converter_0_m_axi_arvalid">
          <CONNECTIONS>
            <CONNECTION INSTANCE="axi_protocol_converter_0" PORT="m_axi_arvalid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="10" NAME="s_axi_awaddr" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_m_axi_awaddr">
          <CONNECTIONS>
            <CONNECTION INSTANCE="axi_protocol_converter_0" PORT="m_axi_awaddr"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="s_axi_awready" SIGIS="undef" SIGNAME="axi_protocol_converter_0_m_axi_awready">
          <CONNECTIONS>
            <CONNECTION INSTANCE="axi_protocol_converter_0" PORT="m_axi_awready"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="s_axi_awvalid" SIGIS="undef" SIGNAME="axi_protocol_converter_0_m_axi_awvalid">
          <CONNECTIONS>
            <CONNECTION INSTANCE="axi_protocol_converter_0" PORT="m_axi_awvalid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="s_axi_bready" SIGIS="undef" SIGNAME="axi_protocol_converter_0_m_axi_bready">
          <CONNECTIONS>
            <CONNECTION INSTANCE="axi_protocol_converter_0" PORT="m_axi_bready"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="1" NAME="s_axi_bresp" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_m_axi_bresp">
          <CONNECTIONS>
            <CONNECTION INSTANCE="axi_protocol_converter_0" PORT="m_axi_bresp"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="s_axi_bvalid" SIGIS="undef" SIGNAME="axi_protocol_converter_0_m_axi_bvalid">
          <CONNECTIONS>
            <CONNECTION INSTANCE="axi_protocol_converter_0" PORT="m_axi_bvalid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="31" NAME="s_axi_rdata" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_m_axi_rdata">
          <CONNECTIONS>
            <CONNECTION INSTANCE="axi_protocol_converter_0" PORT="m_axi_rdata"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="s_axi_rready" SIGIS="undef" SIGNAME="axi_protocol_converter_0_m_axi_rready">
          <CONNECTIONS>
            <CONNECTION INSTANCE="axi_protocol_converter_0" PORT="m_axi_rready"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" LEFT="1" NAME="s_axi_rresp" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_m_axi_rresp">
          <CONNECTIONS>
            <CONNECTION INSTANCE="axi_protocol_converter_0" PORT="m_axi_rresp"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="s_axi_rvalid" SIGIS="undef" SIGNAME="axi_protocol_converter_0_m_axi_rvalid">
          <CONNECTIONS>
            <CONNECTION INSTANCE="axi_protocol_converter_0" PORT="m_axi_rvalid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="31" NAME="s_axi_wdata" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_m_axi_wdata">
          <CONNECTIONS>
            <CONNECTION INSTANCE="axi_protocol_converter_0" PORT="m_axi_wdata"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="s_axi_wready" SIGIS="undef" SIGNAME="axi_protocol_converter_0_m_axi_wready">
          <CONNECTIONS>
            <CONNECTION INSTANCE="axi_protocol_converter_0" PORT="m_axi_wready"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" LEFT="3" NAME="s_axi_wstrb" RIGHT="0" SIGIS="undef" SIGNAME="axi_protocol_converter_0_m_axi_wstrb">
          <CONNECTIONS>
            <CONNECTION INSTANCE="axi_protocol_converter_0" PORT="m_axi_wstrb"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="s_axi_wvalid" SIGIS="undef" SIGNAME="axi_protocol_converter_0_m_axi_wvalid">
          <CONNECTIONS>
            <CONNECTION INSTANCE="axi_protocol_converter_0" PORT="m_axi_wvalid"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="user_temp_alarm_out" SIGIS="undef"/>
        <PORT DIR="I" NAME="vauxn0" SIGIS="undef" SIGNAME="xadc_vauxn0">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="Vaux0_v_n"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="vauxn1" SIGIS="undef" SIGNAME="xadc_vauxn1">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="Vaux1_v_n"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="vauxn8" SIGIS="undef" SIGNAME="xadc_vauxn8">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="Vaux8_v_n"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="vauxn9" SIGIS="undef" SIGNAME="xadc_vauxn9">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="Vaux9_v_n"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="vauxp0" SIGIS="undef" SIGNAME="xadc_vauxp0">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="Vaux0_v_p"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="vauxp1" SIGIS="undef" SIGNAME="xadc_vauxp1">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="Vaux1_v_p"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="vauxp8" SIGIS="undef" SIGNAME="xadc_vauxp8">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="Vaux8_v_p"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="vauxp9" SIGIS="undef" SIGNAME="xadc_vauxp9">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="Vaux9_v_p"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="O" NAME="vccaux_alarm_out" SIGIS="undef"/>
        <PORT DIR="O" NAME="vccddro_alarm_out" SIGIS="undef"/>
        <PORT DIR="O" NAME="vccint_alarm_out" SIGIS="undef"/>
        <PORT DIR="O" NAME="vccpaux_alarm_out" SIGIS="undef"/>
        <PORT DIR="O" NAME="vccpint_alarm_out" SIGIS="undef"/>
        <PORT DIR="I" NAME="vn_in" SIGIS="undef" SIGNAME="xadc_vn_in">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="Vp_Vn_v_n"/>
          </CONNECTIONS>
        </PORT>
        <PORT DIR="I" NAME="vp_in" SIGIS="undef" SIGNAME="xadc_vp_in">
          <CONNECTIONS>
            <CONNECTION INSTANCE="system_imp" PORT="Vp_Vn_v_p"/>
          </CONNECTIONS>
        </PORT>
      </PORTS>
      <BUSINTERFACES>
        <BUSINTERFACE BUSNAME="axi_protocol_converter_0_M_AXI" DATAWIDTH="32" NAME="s_axi_lite" TYPE="SLAVE" VLNV="xilinx.com:interface:aximm:1.0">
          <PARAMETER NAME="ADDR_WIDTH" VALUE="11"/>
          <PARAMETER NAME="ARUSER_WIDTH" VALUE="0"/>
          <PARAMETER NAME="AWUSER_WIDTH" VALUE="0"/>
          <PARAMETER NAME="BUSER_WIDTH" VALUE="0"/>
          <PARAMETER NAME="CLK_DOMAIN" VALUE="system_processing_system7_0_FCLK_CLK3"/>
          <PARAMETER NAME="DATA_WIDTH" VALUE="32"/>
          <PARAMETER NAME="FREQ_HZ" VALUE="200000000"/>
          <PARAMETER NAME="HAS_BRESP" VALUE="1"/>
          <PARAMETER NAME="HAS_BURST" VALUE="0"/>
          <PARAMETER NAME="HAS_CACHE" VALUE="0"/>
          <PARAMETER NAME="HAS_LOCK" VALUE="0"/>
          <PARAMETER NAME="HAS_PROT" VALUE="0"/>
          <PARAMETER NAME="HAS_QOS" VALUE="0"/>
          <PARAMETER NAME="HAS_REGION" VALUE="0"/>
          <PARAMETER NAME="HAS_RRESP" VALUE="1"/>
          <PARAMETER NAME="HAS_WSTRB" VALUE="1"/>
          <PARAMETER NAME="ID_WIDTH" VALUE="0"/>
          <PARAMETER NAME="INSERT_VIP" VALUE="0"/>
          <PARAMETER NAME="MAX_BURST_LENGTH" VALUE="1"/>
          <PARAMETER NAME="NUM_READ_OUTSTANDING" VALUE="1"/>
          <PARAMETER NAME="NUM_READ_THREADS" VALUE="4"/>
          <PARAMETER NAME="NUM_WRITE_OUTSTANDING" VALUE="1"/>
          <PARAMETER NAME="NUM_WRITE_THREADS" VALUE="4"/>
          <PARAMETER NAME="PHASE" VALUE="0.0"/>
          <PARAMETER NAME="PROTOCOL" VALUE="AXI4LITE"/>
          <PARAMETER NAME="READ_WRITE_MODE" VALUE="READ_WRITE"/>
          <PARAMETER NAME="RUSER_BITS_PER_BYTE" VALUE="0"/>
          <PARAMETER NAME="RUSER_WIDTH" VALUE="0"/>
          <PARAMETER NAME="SUPPORTS_NARROW_BURST" VALUE="0"/>
          <PARAMETER NAME="WUSER_BITS_PER_BYTE" VALUE="0"/>
          <PARAMETER NAME="WUSER_WIDTH" VALUE="0"/>
          <PORTMAPS>
            <PORTMAP LOGICAL="ARADDR" PHYSICAL="s_axi_araddr"/>
            <PORTMAP LOGICAL="ARREADY" PHYSICAL="s_axi_arready"/>
            <PORTMAP LOGICAL="ARVALID" PHYSICAL="s_axi_arvalid"/>
            <PORTMAP LOGICAL="AWADDR" PHYSICAL="s_axi_awaddr"/>
            <PORTMAP LOGICAL="AWREADY" PHYSICAL="s_axi_awready"/>
            <PORTMAP LOGICAL="AWVALID" PHYSICAL="s_axi_awvalid"/>
            <PORTMAP LOGICAL="BREADY" PHYSICAL="s_axi_bready"/>
            <PORTMAP LOGICAL="BRESP" PHYSICAL="s_axi_bresp"/>
            <PORTMAP LOGICAL="BVALID" PHYSICAL="s_axi_bvalid"/>
            <PORTMAP LOGICAL="RDATA" PHYSICAL="s_axi_rdata"/>
            <PORTMAP LOGICAL="RREADY" PHYSICAL="s_axi_rready"/>
            <PORTMAP LOGICAL="RRESP" PHYSICAL="s_axi_rresp"/>
            <PORTMAP LOGICAL="RVALID" PHYSICAL="s_axi_rvalid"/>
            <PORTMAP LOGICAL="WDATA" PHYSICAL="s_axi_wdata"/>
            <PORTMAP LOGICAL="WREADY" PHYSICAL="s_axi_wready"/>
            <PORTMAP LOGICAL="WSTRB" PHYSICAL="s_axi_wstrb"/>
            <PORTMAP LOGICAL="WVALID" PHYSICAL="s_axi_wvalid"/>
          </PORTMAPS>
        </BUSINTERFACE>
        <BUSINTERFACE BUSNAME="External_Interface_Vp_Vn" NAME="Vp_Vn" TYPE="TARGET" VLNV="xilinx.com:interface:diff_analog_io:1.0">
          <PORTMAPS>
            <PORTMAP LOGICAL="V_N" PHYSICAL="vn_in"/>
            <PORTMAP LOGICAL="V_P" PHYSICAL="vp_in"/>
          </PORTMAPS>
        </BUSINTERFACE>
        <BUSINTERFACE BUSNAME="External_Interface_Vaux0" NAME="Vaux0" TYPE="TARGET" VLNV="xilinx.com:interface:diff_analog_io:1.0">
          <PORTMAPS>
            <PORTMAP LOGICAL="V_N" PHYSICAL="vauxn0"/>
            <PORTMAP LOGICAL="V_P" PHYSICAL="vauxp0"/>
          </PORTMAPS>
        </BUSINTERFACE>
        <BUSINTERFACE BUSNAME="External_Interface_Vaux1" NAME="Vaux1" TYPE="TARGET" VLNV="xilinx.com:interface:diff_analog_io:1.0">
          <PORTMAPS>
            <PORTMAP LOGICAL="V_N" PHYSICAL="vauxn1"/>
            <PORTMAP LOGICAL="V_P" PHYSICAL="vauxp1"/>
          </PORTMAPS>
        </BUSINTERFACE>
        <BUSINTERFACE BUSNAME="External_Interface_Vaux8" NAME="Vaux8" TYPE="TARGET" VLNV="xilinx.com:interface:diff_analog_io:1.0">
          <PORTMAPS>
            <PORTMAP LOGICAL="V_N" PHYSICAL="vauxn8"/>
            <PORTMAP LOGICAL="V_P" PHYSICAL="vauxp8"/>
          </PORTMAPS>
        </BUSINTERFACE>
        <BUSINTERFACE BUSNAME="External_Interface_Vaux9" NAME="Vaux9" TYPE="TARGET" VLNV="xilinx.com:interface:diff_analog_io:1.0">
          <PORTMAPS>
            <PORTMAP LOGICAL="V_N" PHYSICAL="vauxn9"/>
            <PORTMAP LOGICAL="V_P" PHYSICAL="vauxp9"/>
          </PORTMAPS>
        </BUSINTERFACE>
      </BUSINTERFACES>
    </MODULE>
    <MODULE COREREVISION="9" FULLNAME="/xlconstant" HWVERSION="1.1" INSTANCE="xlconstant" IPTYPE="PERIPHERAL" IS_ENABLE="1" MODCLASS="PERIPHERAL" MODTYPE="xlconstant" VLNV="xilinx.com:ip:xlconstant:1.1">
      <DOCUMENTS/>
      <PARAMETERS>
        <PARAMETER NAME="CONST_VAL" VALUE="0x1"/>
        <PARAMETER NAME="CONST_WIDTH" VALUE="1"/>
        <PARAMETER NAME="Component_Name" VALUE="system_xlconstant_0"/>
        <PARAMETER NAME="EDK_IPTYPE" VALUE="PERIPHERAL"/>
      </PARAMETERS>
      <PORTS>
        <PORT DIR="O" LEFT="0" NAME="dout" RIGHT="0" SIGIS="undef" SIGNAME="xlconstant_dout">
          <CONNECTIONS>
            <CONNECTION INSTANCE="proc_sys_reset" PORT="aux_reset_in"/>
          </CONNECTIONS>
        </PORT>
      </PORTS>
      <BUSINTERFACES/>
    </MODULE>
  </MODULES>

</EDKSYSTEM>
